Prosecution Insights
Last updated: October 26, 2026

Ethan Edward Cutler, USPTO Patent Examiner

Listed by the USPTO as CUTLER, ETHAN EDWARD

Tech Center 2800 • Art Units: 2800 2892

This examiner grants 92% of resolved cases

Analysis

Ethan Edward Cutler examines cases in Tech Center 2800 and Art Unit 2800, with 66 resolved cases. His allowance rate is 92.4%, and the median time to allowance is 1267 days. The interview lift is 11.1%, indicating that interviews are a productive tool for reaching an allowance.

Major applicants include Samsung Electronics Co., Ltd., Taiwan Semiconductor Manufacturing Company, Ltd., and National Institute of Advanced Industrial Science and Technology. Firms like JCIPRNET, Muir Patent Law, PLLC, and Dorsey & Whitney LLP - MTI (Nelson) are top representatives. The 92.4% allowance rate is exceptionally high, though the 1267 day median pendency suggests a longer wait for issuance. With 66 cases resolved, the 11.1% interview lift confirms that direct communication can further enhance the already high probability of success. Practitioners should factor the 1267 day timeline into their long-term patent portfolio strategies.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

92.4%
Allow Rate
+24.4% vs TC avg
90
Total Applications
+11.1%
Interview Lift
1267
Avg Prosecution Days
Based on 66 resolved cases, 2023–2026

Rejection Statute Breakdown

0%
§101 Eligibility
27.4%
§102 Novelty
61.5%
§103 Obviousness
11.1%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
18405534 SEMICONDUCTOR PACKAGE Non-Final OA Samsung Electronics Co., Ltd.
18404529 IINTEGRATED CIRCUIT INCLUDING BACKSIDE WIRING AND METHOD OF MANUFACTURING THE INTEGRATED CIRCUIT Non-Final OA Samsung Electronics Co., Ltd.
18723840 COMPOUND SEMICONDUCTOR SUBSTRATE Non-Final OA NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
17895965 GLASS DIE-TO-DIE BRIDGE AND INTERPOSER FOR DIE FIRST ARCHITECTURE Final Rejection Intel Corporation
18809258 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Non-Final OA Mitsubishi Electric Corporation
18217827 SEMICONDUCTOR DEVICE ASSEMBLIES WITH SCREEN-PRINTED EPOXY SPACERS AND METHODS FOR FORMING THE SAME Non-Final OA Micron Technology, Inc.
17459869 WAFER-LEVEL BACKSIDE LAYER FOR SEMICONDUCTOR APPARATUS Final Rejection TEXAS INSTRUMENTS INCORPORATED
18594987 SEMICONDUCTOR DEVICE INCLUDING SELECTOR Non-Final OA SK hynix Inc.
18403616 PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF Non-Final OA Taiwan Semiconductor Manufacturing Company, Ltd.
18465622 EMBEDDING BARRIER LAYER IN FINE-PITCH BOND STRUCTURES Final Rejection Taiwan Semiconductor Manufacturing Co., Ltd.

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Frequently Asked Questions

What is examiner Ethan Edward Cutler's allowance rate?

92.4% of resolved applications examined by Ethan Edward Cutler were allowed (66 resolved cases), compared with 69.7% across Art Unit 2800 over the last five years.

Does an interview help with examiner Ethan Edward Cutler?

This examiner's interview lift is +11.1 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.

How long does examiner Ethan Edward Cutler take to allow a patent?

Applications allowed by Ethan Edward Cutler took 1,267 days on average from filing to allowance.

Which art unit does examiner Ethan Edward Cutler work in?

Ethan Edward Cutler examines applications in Art Unit 2800 in Tech Center 2800 (Semiconductors, Circuits & Optics).

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