Listed by the USPTO as GHEYAS, SYED I
Tech Center 2800 • Art Units: 2812 2821 2858 2891 2893
This examiner grants 83% of resolved cases
GHEYAS, SYED I has resolved 691 cases in Tech Center 2800 and Art Unit 2812. The allowance rate is 82.8%, while the median time to allowance is 746 days. The interview lift is 3.7%, showing little recorded association between interviews and allowance outcomes. Counsel may therefore place greater emphasis on written claim presentation while assessing the specific application.
The listed companies are Samsung Display Co., Ltd., Wolfspeed Inc., and Samsung Electronics Co., Ltd. The leading firms are DORITY & MANNING, P.A., Maschoff Brennan, and SCHWABE, WILLIAMSON & WYATT, P.C. The docket is centered on electronics and semiconductor applicants.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18782267 | SEMICONDUCTOR PACKAGE | Non-Final OA | Samsung Electronics Co., Ltd. |
| 18663238 | INTEGRATED CIRCUIT SEMICONDUCTOR DEVICE | Non-Final OA | Samsung Electronics Co., Ltd. |
| 18675501 | LIGHT EMITTING DISPLAY DEVICE | Non-Final OA | LG Display Co., Ltd. |
| 18379027 | LIGHT EMITTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME | Non-Final OA | LG DISPLAY CO., LTD. |
| 18751037 | LIGHT EMITTING DISPLAY DEVICE | Non-Final OA | Samsung Display Co., LTD. |
| 18455666 | DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME | Non-Final OA | Samsung Display Co., LTD. |
| 18450636 | PACKAGE SUBSTRATE WITH METALLIZATION LAYER(S) THAT INCLUDES AN ADDITIONAL METAL PAD LAYER TO FACILITATE REDUCED VIA SIZE FOR REDUCED BUMP PITCH, AND RELATED INTEGRATED CIRCUIT (IC) PACKAGES AND FABRICATION METHODS | Non-Final OA | QUALCOMM Incorporated |
| 18214252 | INTEGRATED CAPACITOR | Non-Final OA | Intel Corporation |
| 18128733 | DEVICE UNDER TEST (DUT) STRUCTURES IN FILL REGIONS OF PRODUCT DIE FOR VOLTAGE CONTRAST (VC) DEFECT DETECTION FOR IMPROVED YIELD LEARNING | Non-Final OA | Intel Corporation |
| 18656209 | LOW-K ALD GAP-FILL METHODS AND MATERIAL | Non-Final OA | Lam Research Corporation |
| 18444780 | DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF | Non-Final OA | TAIZHOU GUANYU TECHNOLOGY CO., LTD. |
| 18752009 | High Voltage Switching Device | Non-Final OA | Murata Manufacturing Co., Ltd. |
| 18326628 | BURIED CHANNEL SEMICONDUCTOR DEVICE INCLUDING ENERGY BARRIER MODULATION REGION(S) | Final Rejection | TEXAS INSTRUMENTS INCORPORATED |
| 18737289 | Low Profile Power Module | Non-Final OA | Infineon Technologies AG |
| 18418812 | METHODS OF FORMING INTERCONNECT STRUCTURES | Final Rejection | Applied Materials, Inc. |
| 18494401 | ISOLATION OF P-GAN HEMT BY USE OF GATE RING | Non-Final OA | STMicroelectronics International N.V. |
| 18782716 | METHODS OF MANUFACTURING SEMICONDUCTOR DEVICE | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18752267 | SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF | Non-Final OA | INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE |
| 18293022 | HEATSINK-INTEGRATED CERAMIC SUBSTRATE AND METHOD FOR MANUFACTURING SAME | Non-Final OA | AMOSENSE CO., LTD. |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy82.8% of resolved applications examined by Syed I Gheyas were allowed (691 resolved cases), compared with 82.1% across Art Unit 2812 over the last five years.
This examiner's interview lift is +3.7 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Syed I Gheyas took 746 days on average from filing to allowance.
Syed I Gheyas examines applications in Art Unit 2812 in Tech Center 2800 (Semiconductors, Circuits & Optics).
