Listed by the USPTO as KING, DOUGLAS
Tech Center 2800 • Art Units: 2183 2812 2824 2896
This examiner grants 80% of resolved cases
KING, DOUGLAS is assigned to tech center 2800 and art unit 2183. The profile reports 749 resolved cases and an allowance rate of 80.2%. The median time to allowance is 929 days, while interviews are associated with a 4.3% lift.
The leading companies are Micron Technology Inc., Taiwan Semiconductor Manufacturing Company, Ltd., and Samsung Electronics Co., Ltd. The leading firms are Alliance IP, LLC - Intel, Bayes PLLC, and BIRCH STEWART KOLASCH & BIRCH, LLP. The resolved-case volume supports a meaningful review of prosecution outcomes. The timing measure can guide portfolio calendars, while the interview measure indicates a limited recorded association with allowance changes.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18495210 | FLASH MEMORY AND READ RECOVERY METHOD THEREOF | Non-Final OA | Samsung Electronics Co., Ltd. |
| 18083493 | PROBABILISTIC AND DETERMINISTIC LOGIC DEVICES WITH REDUCED SYMMETRY MATERIALS | Non-Final OA | Intel Corporation |
| 18975874 | MANAGING ERROR COMPENSATION USING CHARGE COUPLING AND LATERAL MIGRATION SENSITIVITY | Non-Final OA | Micron Technology, Inc. |
| 18928674 | CROSS-TEMPERATURE COMPENSATION BASED ON MEDIA ENDURANCE IN MEMORY DEVICES | Non-Final OA | Micron Technology, Inc. |
| 18830272 | MANAGING COMPENSATION FOR CELL-TO-CELL COUPLING AND LATERAL MIGRATION IN MEMORY DEVICES BASED ON A SENSITIVITY METRIC | Final Rejection | Micron Technology, Inc. |
| 18732845 | TEMPERATURE-BASED MEMORY MANAGEMENT | Final Rejection | Micron Technology, Inc. |
| 18668021 | ONE-LADDER READ OF MEMORY CELLS COARSELY PROGRAMMED VIA INTERLEAVED TWO-PASS DATA PROGRAMMING TECHNIQUES | Non-Final OA | Micron Technology, Inc. |
| 18657672 | READ DISTURB MITIGATION BASED ON SIGNAL AND NOISE CHARACTERISTICS OF MEMORY CELLS COLLECTED FOR READ CALIBRATION | Non-Final OA | Micron Technology, Inc. |
| 18255346 | NEURAL NETWORK SYSTEM WITH NEURONS INCLUDING CHARGE-TRAP TRANSISTORS AND NEURAL INTEGRATORS AND METHODS THEREFOR | Non-Final OA | The Regents of the University of California |
| 18498596 | NEURAL NETWORK CIRCUIT AND METHOD FOR FORMING THE SAME | Non-Final OA | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
| 18786276 | EMBEDDED BACKSIDE PCRAM DEVICE STRUCTURE | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy80.2% of resolved applications examined by Douglas King were allowed (749 resolved cases), compared with 72.6% across Art Unit 2183 over the last five years.
This examiner's interview lift is +4.3 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Douglas King took 929 days on average from filing to allowance.
Douglas King examines applications in Art Unit 2183 in Tech Center 2800 (Semiconductors, Circuits & Optics).
