Listed by the USPTO as MULERO FLORES, ERIC MANUEL
Tech Center 2800 • Art Units: 2898
This examiner grants 83% of resolved cases
MULERO FLORES, ERIC MANUEL is assigned to Technology Center 2800 and Art Unit 2898. The profile includes 72 resolved cases, an allowance rate of 83.3%, and a median time to allowance of 1202 days. Interview lift is 16.4%. The small docket limits broad inference, but the reported figures provide a starting point for evaluating allowance outcomes and the length of prosecution.
The listed companies are Taiwan Semiconductor Manufacturing Company, Ltd., Samsung Electronics Co., Ltd., and NANYA TECHNOLOGY Corporation. The firms are BIRCH STEWART KOLASCH & BIRCH, LLP, IntelliFluence Patent Firm, and CHIP LAW GROUP. Counsel can use these names to locate related applications and identify effective response patterns. The allowance rate supports studying successful claim presentations, while the interview measure suggests that examiner contact may complement, rather than replace, focused written advocacy.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18335336 | PACKAGED INTEGRATED CIRCUIT HAVING ENHANCED ELECTRICAL INTERCONNECTS THEREIN | Non-Final OA | Samsung Electronics Co., Ltd. |
| 17475506 | INTEGRATED CIRCUIT CHIP INCLUDING WIRING STRUCTURE | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18058006 | Harvested Reconstitution Bumping | Final Rejection | Apple Inc. |
| 17660002 | DISPLAY DEVICE AND METHOD OF MANUFACTURING DISPLAY DEVICE | Non-Final OA | Samsung Display Co., LTD. |
| 18248497 | DISPLAY DEVICE | Non-Final OA | SONY SEMICONDUCTOR SOLUTIONS CORPORATION |
| 18756082 | ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR, DISPLAY DEVICE | Non-Final OA | BOE TECHNOLOGY GROUP CO., LTD. |
| 17856795 | LAYER SELECTION FOR ROUTING HIGH-SPEED SIGNALS IN SUBSTRATES | Final Rejection | Intel Corporation |
| 17772715 | FORMATION OF MICROLED MESA STRUCTURES WITH ATOMIC LAYER DEPOSITION PASSIVATED SIDEWALLS, A SELF-ALIGNED DIELECTRIC VIA TO THE TOP ELECTRICAL CONTACT, AND A PLASMA-DAMAGE-FREE TOP CONTACT | Non-Final OA | The Regents of the University of California |
| 18595303 | STORAGE DEVICE | Non-Final OA | Kioxia Corporation |
| 18325377 | INTEGRATED CIRCUIT AND RADIO-FREQUENCY MODULE | Final Rejection | Murata Manufacturing Co., Ltd. |
| 17957446 | RADIATOR LAYERS FOR ULTRASONIC TRANSDUCERS | Non-Final OA | TEXAS INSTRUMENTS INCORPORATED |
| 18422890 | SEMICONDUCTOR DEVICE | Non-Final OA | Nuvoton Technology Corporation |
| 18595286 | REPLACEMENT SOURCE/DRAIN CONTACT METHOD IN COMPLEMENTARY FIELD EFFECT TRANSISTOR (CFET) DEVICES | Non-Final OA | Applied Materials, Inc. |
| 18583044 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME | Non-Final OA | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
| 18099555 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18786808 | SOURCE/DRAIN REGIONS OF SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
| 18129204 | PROBING PAD DESIGN IN SCRIBE LINE FOR FLIP CHIP PACKAGE | Non-Final OA | NANYA TECHNOLOGY CORPORATION |
| 18517178 | SEMICONDUCTOR DEVICE | Non-Final OA | NEXPERIA B.V. |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy83.3% of resolved applications examined by Eric Manuel Mulero Flores were allowed (72 resolved cases), compared with 80.2% across Art Unit 2898 over the last five years.
This examiner's interview lift is +16.4 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Eric Manuel Mulero Flores took 1,202 days on average from filing to allowance.
Eric Manuel Mulero Flores examines applications in Art Unit 2898 in Tech Center 2800 (Semiconductors, Circuits & Optics).
