Listed by the USPTO as PETERSON, ERIK T
Tech Center 2800 • Art Units: 2822 2898
This examiner grants 76% of resolved cases
PETERSON, ERIK T works in tech center 2800 and art unit 2822. The record covers 373 resolved cases, with a 76.4% allowance rate and a median of 954 days to allowance. The 10.5% interview lift reflects a positive association between interviews and allowance outcomes.
Taiwan Semiconductor Manufacturing Company, Ltd., DISCO Corporation, and Samsung Electronics Co., Ltd. are the leading listed companies. The listed firms are GREER, BURNS & CRAIN, LTD, Harrity & Harrity, LLP, and Muncy, Geissler, Olds & Lowe, P.C. The profile supports considering interviews as a useful prosecution tool while accounting for the median time shown for this assignment.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18620416 | SEMICONDUCTOR PACKAGE | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18444194 | DISPLAY MODULE AND WEARABLE ELECTRONIC DEVICE INCLUDING THE SAME | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18531070 | POWER MODULE FOR A VEHICLE | Non-Final OA | Robert Bosch GmbH |
| 18293487 | LIGHT EMITTING ELEMENT, DISPLAY SUBSTRATE, AND DISPLAY DEVICE | Non-Final OA | BOE TECHNOLOGY GROUP CO., LTD. |
| 18575185 | DISPLAY PANEL AND DISPLAY APPARATUS | Non-Final OA | BOE Technology Group Co., Ltd. |
| 18755987 | LAYOUT DESIGN SPECIFICATIONS AND METHODOLOGY FOR GENERATING SEMICONDUCTOR CHIP METAL INTERCONNECT LAYOUT FABRICS | Non-Final OA | Intel Corporation |
| 18002525 | Method for Manufacturing Semiconductor Device | Non-Final OA | NTT, Inc. |
| 17632340 | Display Device and Electronic Device | Final Rejection | Semiconductor Energy Laboratory Co., Ltd. |
| 18060305 | LASER DICING TO CONTROL SPLASH | Final Rejection | TEXAS INSTRUMENTS INCORPORATED |
| 18597807 | PINWHEEL-SHAPED CONNECTIONS BETWEEN DIAGONALLY OPPOSITE INTEGRATED CIRCUITS IN A MULTI-CHIP MODULE TO REDUCE NUMBER OF ROUTING LAYERS | Non-Final OA | International Business Machines Corporation |
| 18777380 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE | Non-Final OA | SK Hynix Inc. |
| 17886102 | STIFFENER FRAME FOR SEMICONDUCTOR DEVICE PACKAGES | Final Rejection | Applied Materials, Inc. |
| 18769425 | SEMICONDUCTOR PACKAGE STRUCTURE | Non-Final OA | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. |
| 18767722 | ION IMPLANT PROCESS FOR DEFECT ELIMINATION IN METAL LAYER PLANARIZATION | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18618312 | HYBRID BULK SEMICONDUCTOR AND SEMICONDUCTOR ON INSULATOR (SOI) SUBSTRATE AND METHODS OF FORMATION | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18425352 | SEMICONDUCTOR STRUCTURE | Non-Final OA | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
| 18109116 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE | Non-Final OA | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
| 18328988 | VERIFICATION METHOD FOR DEVICE CHIPS | Final Rejection | DISCO CORPORATION |
| 18321411 | MANUFACTURING METHOD OF CHIPS | Final Rejection | DISCO CORPORATION |
| 18178794 | CHIP MANUFACTURING METHOD | Non-Final OA | DISCO CORPORATION |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy76.4% of resolved applications examined by Erik T Peterson were allowed (373 resolved cases), compared with 48.4% across Art Unit 2822 over the last five years.
This examiner's interview lift is +10.5 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Erik T Peterson took 954 days on average from filing to allowance.
Erik T Peterson examines applications in Art Unit 2822 in Tech Center 2800 (Semiconductors, Circuits & Optics).
