Prosecution Insights
Last updated: October 26, 2026

Samuel Jonathan Smith, USPTO Patent Examiner

Listed by the USPTO as SMITH, SAMUEL JONATHAN

Tech Center 2800 • Art Units: 2817 2897

This examiner grants 84% of resolved cases

Analysis

SMITH, SAMUEL JONATHAN works in Tech Center 2800 and Art Unit 2817. The profile shows 51 resolved cases, an 84.3% allowance rate, and a median of 1264 days to allowance. Interview lift is 4.6%, indicating a modest measured association between interviews and improved outcomes in the available record.

The leading companies are Samsung Electronics Co., Ltd., Intel Corporation, and Taiwan Semiconductor Manufacturing Company, Ltd. The listed firms are Morgan, Lewis & Bockius LLP (WA)(SEC), Harrity & Harrity, LLP, and Maschoff Brennan. Because the case record is limited, counsel should use these figures as directional guidance and supplement them with application-specific analysis.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

84.3%
Allow Rate
+16.3% vs TC avg
79
Total Applications
+4.6%
Interview Lift
1264
Avg Prosecution Days
Based on 51 resolved cases, 2023–2026

Rejection Statute Breakdown

0%
§101 Eligibility
31.6%
§102 Novelty
58.6%
§103 Obviousness
9.4%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
18753244 POWER SEMICONDUCTOR DEVICES Non-Final OA SAMSUNG ELECTRONICS CO., LTD.
18667445 SEMICONDUCTOR DEVICE Non-Final OA Samsung Electronics Co., Ltd.
18648683 SEMICONDUCTOR PACKAGE Non-Final OA SAMSUNG ELECTRONICS CO., LTD.
18439381 SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME Non-Final OA SAMSUNG ELECTRONICS CO., LTD.
18457756 SEMICONDUCTOR DEVICE Final Rejection Samsung Electronics Co., Ltd.
18773380 Display Device Non-Final OA LG Display Co., Ltd.
18306399 MICROELECTRONIC ASSEMBLIES WITH INTEGRATED GLASS-BASED ANTENNA UNITS Non-Final OA Intel Corporation
17507010 DIELECTRIC LAYER SEPARATING A METAL PAD OF A THROUGH GLASS VIA FROM A SURFACE OF THE GLASS Final Rejection Intel Corporation
18757841 ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF Non-Final OA InnoLux Corporation
18588521 SEMICONDUCTOR MANUFACTURING DEVICE, AND SEPARATING MEMBER Non-Final OA Kioxia Corporation
18676649 SEMICONDUCTOR DEVICE AND METHODS OF FORMATION Non-Final OA Taiwan Semiconductor Manufacturing Company, Ltd.
18473185 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Non-Final OA TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

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Frequently Asked Questions

What is examiner Samuel Jonathan Smith's allowance rate?

84.3% of resolved applications examined by Samuel Jonathan Smith were allowed (51 resolved cases), compared with 81.7% across Art Unit 2817 over the last five years.

Does an interview help with examiner Samuel Jonathan Smith?

This examiner's interview lift is +4.6 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.

How long does examiner Samuel Jonathan Smith take to allow a patent?

Applications allowed by Samuel Jonathan Smith took 1,264 days on average from filing to allowance.

Which art unit does examiner Samuel Jonathan Smith work in?

Samuel Jonathan Smith examines applications in Art Unit 2817 in Tech Center 2800 (Semiconductors, Circuits & Optics).

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