Listed by the USPTO as SON, ERIKA HEERA
Tech Center 2800 • Art Units: 2893
This examiner grants 64% of resolved cases
SON, ERIKA HEERA works in Tech Center 2800 and Art Unit 2893. The profile records 31 resolved cases, a 64.5% allowance rate, and a median of 1396 days to allowance. Interview lift is 2.7%, showing only a limited measured association between interviews and allowance outcomes in the available record.
Samsung Electronics Co., Ltd., Taiwan Semiconductor Manufacturing Company, Ltd., and Fuji Electric Co., Ltd. are the listed companies. Birch Stewart Kolasch & Birch, LLP, Eschweiler & Potashnik, LLC (TSMC), and Fish & Richardson P.C. (TC) are the listed firms. The small case record and extended timing support cautious expectations and application-specific preparation.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18646858 | SEMICONDUCTOR PACKAGE | Non-Final OA | Samsung Electronics Co., Ltd. |
| 18635282 | SEMICONDUCTOR DEVICE | Non-Final OA | Samsung Electronics Co., Ltd. |
| 18509736 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME | Non-Final OA | Samsung Electronics Co., Ltd. |
| 18378170 | SEMICONDUCTOR DEVICE | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18062713 | SEMICONDUCTOR DEVICES | Non-Final OA | Samsung Electronics Co., Ltd. |
| 17746889 | SEMICONDUCTOR MODULE AND METHOD FOR MANUFACTURING SEMICONDUCTOR MODULE | Non-Final OA | FUJI ELECTRIC CO., LTD. |
| 18176931 | Methods of Forming Bent Display Panels | Non-Final OA | Apple Inc. |
| 17790577 | ARRAY SUBSTRATE AND DISPLAY DEVICE | Final Rejection | BOE TECHNOLOGY GROUP CO., LTD. |
| 18154986 | Magnetic Memory Device Based on Perpendicular Exchange Bias and Method of Manufacturing Magnetic Memory Device | Non-Final OA | Korea Advanced Institute of Science and Technology |
| 18825580 | CIRCUIT FOR HIGH VOLTAGE IN SEMICONDUCTOR DEVICES | Non-Final OA | INTERNATIONAL BUSINESS MACHINES CORPORATION |
| 18073739 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | Non-Final OA | SK hynix Inc. |
| 18185232 | STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH SEMICONDUCTOR NANOSTRUCTURE | Final Rejection | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 17750746 | BOND ROUTING STRUCTURE FOR STACKED WAFERS | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18786524 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THEREOF | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy64.5% of resolved applications examined by Erika Heera Son were allowed (31 resolved cases), compared with 79.0% across Art Unit 2893 over the last five years.
This examiner's interview lift is +2.7 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Erika Heera Son took 1,396 days on average from filing to allowance.
Erika Heera Son examines applications in Art Unit 2893 in Tech Center 2800 (Semiconductors, Circuits & Optics).
