Prosecution Insights
Last updated: October 27, 2026

Binh C Tat, USPTO Patent Examiner

Listed by the USPTO as TAT, BINH C

Tech Center 2800 • Art Units: 2825 2851

This examiner grants 87% of resolved cases

Analysis

TAT, BINH C is assigned to tech center 2800 and art unit 2825. The record contains 1234 resolved cases, an allowance rate of 87.3%, and a median of 927 days to allowance. Interview lift is 14.3%, adding a positive but limited procedural signal.

Taiwan Semiconductor Manufacturing Company, Ltd., Hyundai WIA Corporation, and Mitsubishi Heavy Industries Ltd. are the leading companies. The principal firms are FINNEGAN, HENDERSON, FARABOW, GARRETT & DUNNER, Harrity & Harrity, LLP, and Lempia Summerfield Katz LLC (HMC/KMC). The large case volume supports portfolio planning, while the median timing remains relevant for setting expectations about examination duration.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

87.3%
Allow Rate
+19.3% vs TC avg
1,260
Total Applications
+14.3%
Interview Lift
927
Avg Prosecution Days
Based on 1234 resolved cases, 2023–2026

Rejection Statute Breakdown

24.5%
§101 Eligibility
63.5%
§102 Novelty
1.3%
§103 Obviousness
0.5%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
18430978 DESIGN SUPPORT APPARATUS, DESIGN SUPPORT PROGRAM, AND DESIGN SUPPORT METHOD Non-Final OA MITSUBISHI HEAVY INDUSTRIES, LTD.
18407480 METHOD FOR PERFORMING BLOCK LEVEL EXPLORATION OF INTEGRATED CIRCUIT DESIGN, ASSOCIATED ELECTRONIC DEVICE AND ASSOCIATED COMPUTER-READABLE MEDIUM Non-Final OA MEDIATEK INC.
18527145 METHOD AND A PROTOTYPE ELECTRONIC CIRCUIT FOR DESIGNING AN ELECTRONIC CIRCUIT Non-Final OA Skyworks Solutions, Inc.
18502377 INTEGRATED CIRCUIT DESIGN FLOW WITH LAYOUT ADJUSTMENT Non-Final OA Taiwan Semiconductor Manufacturing Company, Ltd.
18568115 COMPUTER IMPLEMENTED METHOD FOR DIAGNOSING A SYSTEM COMPRISING A PLURALITY OF MODULES Non-Final OA ASML NETHERLANDS B.V.
18278881 METHOD OF PATTERN SELECTION FOR A SEMICONDUCTOR MANUFACTURING RELATED PROCESS Final Rejection ASML NETHERLANDS B.V.

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Frequently Asked Questions

What is examiner Binh C Tat's allowance rate?

87.3% of resolved applications examined by Binh C Tat were allowed (1,234 resolved cases), compared with 81.3% across Art Unit 2825 over the last five years.

Does an interview help with examiner Binh C Tat?

This examiner's interview lift is +14.3 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.

How long does examiner Binh C Tat take to allow a patent?

Applications allowed by Binh C Tat took 927 days on average from filing to allowance.

Which art unit does examiner Binh C Tat work in?

Binh C Tat examines applications in Art Unit 2825 in Tech Center 2800 (Semiconductors, Circuits & Optics).

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