Technology area: Semiconductors, Circuits & Optics
5 pending office actions • 5 art units • 5 examiners • 0 of 5 (0%) have an AI response strategy ready • 13 patents granted in the last 365 days
Adeia Semiconductor Solutions LLC currently manages 5 pending office actions in the Semiconductors, Circuits & Optics technology area. These matters are assigned to distinct examiners, ensuring that the company's prosecution is not overly dependent on any single official. The actions are also spread across a matching number of distinct art units, which indicates a wide technical distribution for the company's active intellectual property.
VU A VU is the busiest examiner for the portfolio, overseeing 1 pending office action. Because the busiest examiner pending count is only one-fifth of the 5 total pending office actions, the company must manage multiple separate lines of communication with the patent office. This one to one ratio between actions, examiners, and art units suggests that each application is being treated as a unique technical and procedural challenge. Practitioners should be prepared to adapt their arguments to the specific standards of the various art units and the preferences of the different examiners to advance the semiconductor portfolio effectively.
Based on the USPTO statutory response window for each pending office action. 2 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §103 only | 1 (20%) |
| §102 only | 1 (20%) |
| §112 only | 1 (20%) |
| Multi-statute (no §101) | 2 (40%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| VU, VU A | 1 | 92.3% | +6.7% |
| ANDUJAR, LEONARDO | 1 | 75.6% | -0.5% |
| MANN, WILLIAM ROBERT | 1 | — | — |
| RAHMAN, MOIN M | 1 | 87.1% | +14.0% |
| CRITE, ANTONIO B | 1 | 81.6% | -13.0% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 16213618 | LOW-RESISTIVITY METALLIC INTERCONNECT STRUCTURES WITH SELF-FORMING DIFFUSION BARRIER LAYERS | CRITE, ANTONIO B | 29d |
| 18827395 | PUNCH THROUGH STOPPER IN BULK FINFET DEVICE | VU, VU A | — |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18543532 | ADVANCED COPPER INTERCONNECTS WITH HYBRID MICROSTRUCTURE | RAHMAN, MOIN M | 99d overdue |
| 18793294 | SEMICONDUCTOR INTERCONNECT STRUCTURE WITH DOUBLE CONDUCTORS | MANN, WILLIAM ROBERT | — |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 1 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18543532 | ADVANCED COPPER INTERCONNECTS WITH HYBRID MICROSTRUCTURE | RAHMAN, MOIN M | 99d overdue |
| Art Unit | Apps |
|---|---|
| 2812 | 1 |
| 3991 | 1 |
| 2897 | 1 |
| 2898 | 1 |
| 2817 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 18827395 | PUNCH THROUGH STOPPER IN BULK FINFET DEVICE | VU, VU A | 2812 | §102 | Non-Final OA | — | Pending | Sep 06, 2024 |
| 18794367 | STRUCTURE AND PROCESS TO TUCK FIN TIPS SELF-ALIGNED TO GATES | ANDUJAR, LEONARDO | 3991 | §112 | Non-Final OA | — | Pending | Aug 05, 2024 |
| 18793294 | SEMICONDUCTOR INTERCONNECT STRUCTURE WITH DOUBLE CONDUCTORS | MANN, WILLIAM ROBERT | 2897 | §102§103Other | Non-Final OA | — | Pending | Aug 02, 2024 |
| 18543532 | ADVANCED COPPER INTERCONNECTS WITH HYBRID MICROSTRUCTURE | RAHMAN, MOIN M | 2898 | §103§112 | Non-Final OA | 99d overdue | Pending | Dec 18, 2023 |
| 16213618 | LOW-RESISTIVITY METALLIC INTERCONNECT STRUCTURES WITH SELF-FORMING DIFFUSION BARRIER LAYERS | CRITE, ANTONIO B | 2817 | §103 | Non-Final OA | 29d | Pending | Dec 07, 2018 |
IP Author helps IP teams respond to office actions faster with AI-generated responses, examiner analytics, and prosecution intelligence.
Start Free TrialAdeia Semiconductor Solutions LLC has 5 pending office actions as of October 2026, spread across 5 art units and 5 examiners.
Vu A Vu has the most, with 1 of Adeia Semiconductor Solutions LLC's pending office actions.
Mostly Semiconductors, Circuits & Optics (USPTO Tech Center 2800), based on where its pending office actions are examined.
