Technology area: Semiconductors, Circuits & Optics
5 pending office actions • 3 art units • 4 examiners • 0 of 5 (0%) have an AI response strategy ready • 8 patents granted in the last 365 days
Atomera Incorporated has 6 pending office actions in Semiconductors, Circuits & Optics. The matters are handled by 5 distinct examiners across 3 distinct art units. Examiner coverage is therefore broad, while the art-unit distribution is more concentrated than the examiner distribution.
LUU, PHO M is the busiest examiner, with 2 pending matters. The profile supports a coordinated review of semiconductor claim language across the 3 art units, combined with separate response planning for the 5 examiners. The limited concentration with LUU, PHO M does not replace the need for portfolio-wide consistency.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §103 only | 1 (20%) |
| §102 only | 1 (20%) |
| Multi-statute (no §101) | 3 (60%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| LUU, PHO M | 2 | 96.9% | +3.3% |
| REAMES, MATTHEW L | 1 | 77.2% | +18.0% |
| LEBENTRITT, MICHAEL | 1 | 92.2% | +6.2% |
| TIVARUS, CRISTIAN ALEXANDRU | 1 | 74.5% | +28.0% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 19002251 | Integrated Circuit Chip Including Arrays Of Multi-Threaded Dynamic Random Access Memory Unit Cells | LUU, PHO M | — |
| 19002273 | Interconnect Structure For An Array Of Multi-Threaded Dynamic Random Access Memory Systems | LUU, PHO M | — |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 3 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18790385 | METHOD FOR MAKING COMPLEMENTARY FIELD EFFECT TRANSISTOR (CFET) DEVICES INCLUDING SUPERLATTICE ISOLATION LAYER | REAMES, MATTHEW L | — |
| 18657898 | DMOS DEVICES INCLUDING A SUPERLATTICE AND FIELD PLATE FOR DRIFT REGION DIFFUSION | LEBENTRITT, MICHAEL | — |
| 18613509 | NANOSTRUCTURE TRANSISTORS WITH SOURCE/DRAIN TRENCH CONTACT LINERS | TIVARUS, CRISTIAN ALEXANDRU | — |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18790385 | METHOD FOR MAKING COMPLEMENTARY FIELD EFFECT TRANSISTOR (CFET) DEVICES INCLUDING SUPERLATTICE ISOLATION LAYER | REAMES, MATTHEW L | — |
| 18613509 | NANOSTRUCTURE TRANSISTORS WITH SOURCE/DRAIN TRENCH CONTACT LINERS | TIVARUS, CRISTIAN ALEXANDRU | — |
| Art Unit | Apps |
|---|---|
| 2824 | 2 |
| 2812 | 1 |
| 2899 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 19002251 | Integrated Circuit Chip Including Arrays Of Multi-Threaded Dynamic Random Access Memory Unit Cells | LUU, PHO M | 2824 | §103 | Non-Final OA | — | Pending | Dec 26, 2024 |
| 19002273 | Interconnect Structure For An Array Of Multi-Threaded Dynamic Random Access Memory Systems | LUU, PHO M | 2824 | §102 | Non-Final OA | — | Pending | Dec 26, 2024 |
| 18790385 | METHOD FOR MAKING COMPLEMENTARY FIELD EFFECT TRANSISTOR (CFET) DEVICES INCLUDING SUPERLATTICE ISOLATION LAYER | REAMES, MATTHEW L | 2812 | §103§112Other | Non-Final OA | — | Pending | Jul 31, 2024 |
| 18657898 | DMOS DEVICES INCLUDING A SUPERLATTICE AND FIELD PLATE FOR DRIFT REGION DIFFUSION | LEBENTRITT, MICHAEL | — | §102§103 | Non-Final OA | — | Pending | May 08, 2024 |
| 18613509 | NANOSTRUCTURE TRANSISTORS WITH SOURCE/DRAIN TRENCH CONTACT LINERS | TIVARUS, CRISTIAN ALEXANDRU | 2899 | §102§112 | Final Rejection | — | Pending | Mar 22, 2024 |
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Start Free TrialAtomera Incorporated has 5 pending office actions as of October 2026, spread across 3 art units and 4 examiners.
Pho M Luu has the most, with 2 of Atomera Incorporated's pending office actions.
Mostly Semiconductors, Circuits & Optics (USPTO Tech Center 2800), based on where its pending office actions are examined.
