Prosecution Insights
Last updated: October 26, 2026

William Adrovel, USPTO Patent Examiner

Listed by the USPTO as ADROVEL, WILLIAM

Tech Center 2800 • Art Units: 2483 2800 2898

This examiner grants 44% of resolved cases

Analysis

ADROVEL, WILLIAM has 162 resolved cases in tech center 2800 and art unit 2483. The allowance rate is 44.4%, and the interview lift is 52.9%. The median time to allowance is 1,449 days. The profile indicates a comparatively demanding allowance environment, but also a strong recorded association between interviews and improved outcomes.

Taiwan Semiconductor Manufacturing Company, Ltd., Western Digital Technologies Inc., and Azimuth Industrial Company, Inc. are the leading companies. BIRCH STEWART KOLASCH & BIRCH, LLP, FOLEY & LARDNER LLP, and Harrity & Harrity, LLP are the leading firms. Practitioners may want to prepare interview materials early and tie them to precise amendment proposals.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

44.4%
Allow Rate
-23.6% vs TC avg
192
Total Applications
+52.9%
Interview Lift
1449
Avg Prosecution Days
Based on 162 resolved cases, 2023–2026

Rejection Statute Breakdown

6.6%
§101 Eligibility
18.9%
§102 Novelty
66.8%
§103 Obviousness
5.4%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
18397325 SEMICONDUCTOR DEVICE INCLUDING TWO-DIMENSIONAL MATERIAL AND ELECTRONIC DEVICE INCLUDING THE SEMICONDUCTOR DEVICE Final Rejection Samsung Electronics Co., Ltd.
18397483 INTEGRATED CIRCUIT INCLUDING BACKSIDE WIRING AND METHOD OF DESIGNING THE SAME Final Rejection SAMSUNG ELECTRONICS CO., LTD.
18468362 PACKAGING DEVICE, PACKAGING MODULE, AND ELECTRONIC DEVICE Final Rejection Huawei Digital Power Technologies Co., Ltd.
18404584 ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME Non-Final OA InnoLux Corporation
18663327 SEMICONDUCTOR DEVICE Non-Final OA DENSO CORPORATION
18523477 Compound Semiconductor Device for High Power and High Frequency Operation Non-Final OA Mitsubishi Electric Research Laboratories, Inc.
18618930 Memory Circuitry Comprising Strings Of Memory Cells And Method Used In Forming Memory Circuitry Comprising Strings Of Memory Cells Non-Final OA Micron Technology, Inc.
18457645 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR MEMORY DEVICE Final Rejection Kioxia Corporation
18712735 RADIATION-EMITTING COMPONENT AND METHOD FOR PRODUCING A RADIATION-EMITTING COMPONENT Non-Final OA ams-OSRAM International GmbH
18584130 BACKSIDE VIA FOR BACKSIDE POWER SCHEME Final Rejection INTERNATIONAL BUSINESS MACHINES CORPORATION
18498305 OXYGEN CONTROL DURING GATE FORMATION FOR IMPROVED CHANNEL MOBILITY Non-Final OA Taiwan Semiconductor Manufacturing Company, Ltd.
18469094 SEMICONDUCTOR MEMORY CELL STRUCTURE INCLUDING A HYDROGEN ABSORPTION LAYER Final Rejection Taiwan Semiconductor Manufacturing Company, Ltd.
18367605 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Non-Final OA Taiwan Semiconductor Manufacturing Company, Ltd.
18434222 EMBEDDED PASSIVE DEVICES FOR INTEGRATED CIRCUITS AND METHODS OF FORMING THE SAME Non-Final OA Taiwan Semiconductor Manufacturing Co., Ltd.
18403418 SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD OF FORMING SAME Non-Final OA Taiwan Semiconductor Manufacturing Co., Ltd.

Facing This Examiner?

IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.

Build Your Strategy

Who Appears Before This Examiner

Top companies before this examiner

Law firms appearing most often

Frequently Asked Questions

What is examiner William Adrovel's allowance rate?

44.4% of resolved applications examined by William Adrovel were allowed (162 resolved cases), compared with 63.2% across Art Unit 2483 over the last five years.

Does an interview help with examiner William Adrovel?

This examiner's interview lift is +52.9 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.

How long does examiner William Adrovel take to allow a patent?

Applications allowed by William Adrovel took 1,449 days on average from filing to allowance.

Which art unit does examiner William Adrovel work in?

William Adrovel examines applications in Art Unit 2483 in Tech Center 2800 (Semiconductors, Circuits & Optics).

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month