Listed by the USPTO as JONES, ERIC W
Tech Center 2800 • Art Units: 2881 2892
This examiner grants 62% of resolved cases
Eric W. Jones is a patent examiner in Tech Center 2800 and Art Unit 2881. He has overseen 717 resolved cases. The data shows an allowance rate of 62.2% for these applications. The median pendency to reach an allowance is 1135 days. An interview lift of 17.3% is recorded, which indicates that the probability of allowance increases when an interview is conducted.
The examiner's top companies include Taiwan Semiconductor Manufacturing Company, Ltd., Intel Corporation, and Ams-osram AG. Legal representation is frequently provided by firms such as Akona IP PC - Intel, Anova Law Group, PLLC, and Bayes PLLC. The 17.3% interview lift suggests that practitioners may use direct engagement to advance prosecution. With 717 resolved cases, the 62.2% allowance rate serves as a benchmark for evaluating outcomes. The 1135 days median pendency provides a timeline for planning prosecution steps in Tech Center 2800. These figures offer a data-grounded view of the examiner's performance.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18400810 | DISPLAY PANEL AND DISPLAY DEVICE INCLUDING THE SAME | Non-Final OA | LG Display Co., Ltd. |
| 18140465 | RF ANTENNA MODULE USING COPPER-TO-COPPER INTERCONNECTS BETWEEN THE ANTENNA AND THE RF DIE | Final Rejection | Intel Corporation |
| 17372612 | MEMORY CELLS WITH NON-PLANAR FERROELECTRIC OR ANTIFERROELECTRIC MATERIALS | Final Rejection | Intel Corporation |
| 18796246 | HIGH ETCH SELECTIVITY, LOW STRESS ASHABLE CARBON HARD MASK | Non-Final OA | LAM RESEARCH CORPORATION |
| 18751061 | THERMAL PADS BETWEEN STACKED SEMICONDUCTOR DIES AND ASSOCIATED SYSTEMS AND METHODS | Non-Final OA | Micron Technology, Inc. |
| 18009970 | DISPLAY DEVICE WITH BENDING REGION REINFORCING STRUCTURE AND MANUFACTURING METHOD THEREOF | Final Rejection | SHARP KABUSHIKI KAISHA |
| 18730675 | METHOD FOR PRODUCING A PLURALITY OF OPTOELECTRONIC SEMICONDUCTOR CHIPS, AND OPTOELECTRONIC SEMICONDUCTOR CHIP | Non-Final OA | AMS-OSRAM INTERNATIONAL GMBH |
| 18696484 | OPTOELECTRONIC COMPONENT, OPTOELECTRONIC DEVICE, AND METHOD FOR PRODUCING OPTOELECTRONIC COMPONENTS OR OPTOELECTRONIC DEVICES | Non-Final OA | AMS-OSRAM International GmbH |
| 18781105 | OVERHANGING SOURCE/DRAIN CONTACT | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18789808 | Via for Component Electrode Connection | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
| 18777240 | NANOSTRUCTURE DEVICE WITH REDUCED HIGH-K DIELECTRIC AREA AND RELATED METHOD | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
| 18766300 | SELECTIVE DEPOSITION OF METAL BARRIER IN DAMASCENE PROCESSES | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy62.2% of resolved applications examined by Eric W Jones were allowed (717 resolved cases), compared with 69.6% across Art Unit 2881 over the last five years.
This examiner's interview lift is +17.3 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Eric W Jones took 1,135 days on average from filing to allowance.
Eric W Jones examines applications in Art Unit 2881 in Tech Center 2800 (Semiconductors, Circuits & Optics).
