Prosecution Insights
Last updated: October 27, 2026

Dharti Haridas Patel, USPTO Patent Examiner

Listed by the USPTO as PATEL, DHARTI HARIDAS

Tech Center 2800 • Art Units: 2836 2838 2844 2893

This examiner grants 87% of resolved cases

Analysis

PATEL, DHARTI HARIDAS is assigned to tech center 2800 and art unit 2836. Her record covers 1,272 resolved cases, with an 87.3% allowance rate and an 834-day median time to allowance. The interview lift is 7.7%, showing a positive but modest association with allowance outcomes.

The listed companies are Samsung Electronics Co., Ltd., ABB Schweiz AG, and Panasonic Holdings Corporation. The listed firms are AGORA LAW GROUP, PLLC, Fitch, Even, Tabin & Flannery, LLP, and GREENBLUM & BERNSTEIN, P.L.C. The high allowance rate and 834-day median provide a useful historical framework, while the interview figure supports treating interviews as a supplementary prosecution option.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

87.3%
Allow Rate
+19.3% vs TC avg
1,295
Total Applications
+7.7%
Interview Lift
834
Avg Prosecution Days
Based on 1272 resolved cases, 2023–2026

Rejection Statute Breakdown

1.0%
§101 Eligibility
44.2%
§102 Novelty
42.8%
§103 Obviousness
2.5%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
19018089 SEMICONDUCTOR WAFER PROCESSING APPARATUS Non-Final OA Samsung Electronics Co., Ltd.
18971395 SEMICONDUCTOR DEVICE AND POWER SEMICONDUCTOR SYSTEM INCLUDING THE SAME Non-Final OA SAMSUNG ELECTRONICS CO., LTD.
18829431 Aliasing-Based Broadband Noise Power Estimation for Arc-Fault Detection Non-Final OA ABB Schweiz AG
19101095 SHUTOFF SYSTEM Non-Final OA Panasonic Intellectual Property Management Co., Ltd.
18869066 CHARGING DEVICE Non-Final OA Nippon Telegraph and Telephone Corporation
18936807 DYNAMIC CURRENT PROTECTION FOR SERVER LOADS Non-Final OA LENOVO GLOBAL TECHNOLOGY (UNITED STATES) INC.
19093771 CIRCUIT ARRANGEMENT FOR CONTROLLING AN ELECTRONIC FUSE AND METHOD FOR OPERATING SUCH A CIRCUIT ARRANGEMENT Non-Final OA Conti Temic microelectronic GmbH
19075387 EMBEDDED IN-CORD ACTIVE INRUSH CURRENT LIMITER DEVICE FOR POWER SUPPLY UNIT Non-Final OA VERTIV CORPORATION
18607098 POWER CLAMP CIRCUIT AND ELECTRONIC DEVICE INCLUDING POWER CLAMP CIRCUIT Non-Final OA SK hynix Inc.
18768453 Semiconductor Device Non-Final OA ROHM CO., LTD.
19013048 Bowed Substrate Clamping Method, Apparatus, and System Non-Final OA Applied Materials, Inc.
19019309 FAULT MANAGED POWER SYSTEMS Non-Final OA Schneider Electric USA, Inc.
19094087 PROTECTION CIRCUIT AND EMBEDDED MULTI-CHIP SYSTEM Non-Final OA INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

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Frequently Asked Questions

What is examiner Dharti Haridas Patel's allowance rate?

87.3% of resolved applications examined by Dharti Haridas Patel were allowed (1,272 resolved cases), compared with 66.2% across Art Unit 2836 over the last five years.

Does an interview help with examiner Dharti Haridas Patel?

This examiner's interview lift is +7.7 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.

How long does examiner Dharti Haridas Patel take to allow a patent?

Applications allowed by Dharti Haridas Patel took 834 days on average from filing to allowance.

Which art unit does examiner Dharti Haridas Patel work in?

Dharti Haridas Patel examines applications in Art Unit 2836 in Tech Center 2800 (Semiconductors, Circuits & Optics).

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