Technology area: Semiconductors, Circuits & Optics
4 pending office actions • 3 art units • 4 examiners • 0 of 4 (0%) have an AI response strategy ready • 2 patents granted in the last 365 days
Chipletz Inc. has 4 pending office actions in Semiconductors, Circuits & Optics. The matters involve 4 distinct examiners and 3 distinct art units. GEYER, SCOTT B is the busiest examiner, with 1 pending matter. Examiner assignments are distributed, while the art-unit assignments show some concentration.
The portfolio benefits from a coordinated technical framework for chiplet, semiconductor, circuit, and optical concepts, but each office action requires independent analysis. Counsel should map claim limitations to the relevant architecture, interconnect, packaging, or operating relationship and tie amendments to the specification. Grouping matters by art-unit context may help organize prior-art review, while the distinct examiners require separate response and interview planning. Consistency should be preserved without treating the records as interchangeable.
Based on the USPTO statutory response window for each pending office action. 4 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.
Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 4 of the docket's apps have a known mailing date.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §103 only | 1 (25%) |
| §102 only | 1 (25%) |
| Multi-statute (no §101) | 2 (50%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| GEYER, SCOTT B | 1 | 94.2% | +4.2% |
| LIU, XIAOMING | 1 | 86.7% | +10.6% |
| LOHAKARE, PRATIKSHA JAYANT | 1 | 82.8% | +13.9% |
| LEPISTO, RYAN A | 1 | 87.7% | +7.8% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18132336 | Co-Packaging Assembly and Method for Attaching Photonic Dies/Modules to Multi-Chip Active/Passive Substrate | LEPISTO, RYAN A | 36d overdue |
| 18206933 | Inductors Embedded in Package Substrate and Board and Method and System for Manufacturing the Same | LOHAKARE, PRATIKSHA JAYANT | 14d |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18378235 | Method and Apparatus for Prevention, Cessation, Detection, and Monitoring of Cracks in Substrates | LIU, XIAOMING | 30d overdue |
| 18773795 | APPARATUS AND METHOD FOR IMPROVING YIELD OF ADVANCED PACKAGES | GEYER, SCOTT B | 14d |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18378235 | Method and Apparatus for Prevention, Cessation, Detection, and Monitoring of Cracks in Substrates | LIU, XIAOMING | 30d overdue |
| 18206933 | Inductors Embedded in Package Substrate and Board and Method and System for Manufacturing the Same | LOHAKARE, PRATIKSHA JAYANT | 14d |
| Art Unit | Apps |
|---|---|
| 2812 | 2 |
| 2818 | 1 |
| 2874 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 18773795 | APPARATUS AND METHOD FOR IMPROVING YIELD OF ADVANCED PACKAGES | GEYER, SCOTT B | 2812 | §102§112 | Final Rejection | 14d | Pending | Jul 16, 2024 |
| 18378235 | Method and Apparatus for Prevention, Cessation, Detection, and Monitoring of Cracks in Substrates | LIU, XIAOMING | 2812 | §102§103 | Final Rejection | 30d overdue | Pending | Oct 10, 2023 |
| 18206933 | Inductors Embedded in Package Substrate and Board and Method and System for Manufacturing the Same | LOHAKARE, PRATIKSHA JAYANT | 2818 | §103 | Final Rejection | 14d | Pending | Jun 07, 2023 |
| 18132336 | Co-Packaging Assembly and Method for Attaching Photonic Dies/Modules to Multi-Chip Active/Passive Substrate | LEPISTO, RYAN A | 2874 | §102 | Final Rejection | 36d overdue | Pending | Apr 07, 2023 |
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Start Free TrialChipletz Inc. has 4 pending office actions as of October 2026, spread across 3 art units and 4 examiners.
Scott B Geyer has the most, with 1 of Chipletz Inc.'s pending office actions.
Mostly Semiconductors, Circuits & Optics (USPTO Tech Center 2800), based on where its pending office actions are examined.
