Prosecution Insights
Prosecution Insights
6 pending office actions • 5 art units • 6 examiners • 0 of 6 (0%) have an AI response strategy ready • 7 patents granted in the last 365 days
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §103 only | 4 (67%) |
| Multi-statute (no §101) | 2 (33%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| SQUIRES, BRETT STEPHEN | 1 | 48.1% | +48.5% |
| SENGDARA, VONGSAVANH | 1 | 72.0% | +18.5% |
| SARKER-NAG, AKHEE | 1 | 80.3% | +12.9% |
| MARIN, JACOB RAUL | 1 | 100.0% | +0.0% |
| MCCOY, THOMAS WILSON | 1 | 87.5% | +6.3% |
| WARD, DAVID WILLIAM | 1 | 61.4% | +41.9% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 3 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18558422 | REVERSE CONDUCTING LATERAL INSULATED-GATE BIPOLAR TRANSISTOR | SARKER-NAG, AKHEE | — |
| 18284052 | SEMICONDUCTOR DEVICE HAVING SPLIT GATE STRUCTURE AND MANUFACTURING METHOD THEREFOR | MARIN, JACOB RAUL | — |
| 18277658 | LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE AND PREPARATION METHOD THEREFOR | MCCOY, THOMAS WILSON | — |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18689029 | TRENCH-TYPE DMOS DEVICE AND MANUFACTURING METHOD THEREFOR | SQUIRES, BRETT STEPHEN | — |
| 18567101 | GGNMOS TRANSISTOR STRUCTURE, ESD PROTECTION DEVICE AND CIRCUIT | SENGDARA, VONGSAVANH | — |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 4 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18689029 | TRENCH-TYPE DMOS DEVICE AND MANUFACTURING METHOD THEREFOR | SQUIRES, BRETT STEPHEN | — |
| 18567101 | GGNMOS TRANSISTOR STRUCTURE, ESD PROTECTION DEVICE AND CIRCUIT | SENGDARA, VONGSAVANH | — |
| 18558422 | REVERSE CONDUCTING LATERAL INSULATED-GATE BIPOLAR TRANSISTOR | SARKER-NAG, AKHEE | — |
| 18258180 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR | WARD, DAVID WILLIAM | — |
| Art Unit | Apps |
|---|---|
| 2893 | 2 |
| 2899 | 1 |
| 2818 | 1 |
| 2814 | 1 |
| 2891 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 18689029 | TRENCH-TYPE DMOS DEVICE AND MANUFACTURING METHOD THEREFOR | SQUIRES, BRETT STEPHEN | 2899 | §103§112 | Non-Final OA | — | Pending | Mar 04, 2024 |
| 18567101 | GGNMOS TRANSISTOR STRUCTURE, ESD PROTECTION DEVICE AND CIRCUIT | SENGDARA, VONGSAVANH | 2893 | §103§112 | Non-Final OA | — | Pending | Dec 05, 2023 |
| 18558422 | REVERSE CONDUCTING LATERAL INSULATED-GATE BIPOLAR TRANSISTOR | SARKER-NAG, AKHEE | 2893 | §103 | Final Rejection | — | Pending | Nov 01, 2023 |
| 18284052 | SEMICONDUCTOR DEVICE HAVING SPLIT GATE STRUCTURE AND MANUFACTURING METHOD THEREFOR | MARIN, JACOB RAUL | 2818 | §103 | Non-Final OA | — | Pending | Sep 25, 2023 |
| 18277658 | LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE AND PREPARATION METHOD THEREFOR | MCCOY, THOMAS WILSON | 2814 | §103 | Non-Final OA | — | Pending | Aug 17, 2023 |
| 18258180 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR | WARD, DAVID WILLIAM | 2891 | §103 | Non-Final OA | — | Pending | Jun 16, 2023 |
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