Prosecution Insights
Last updated: October 04, 2026

CSMC Technologies Fab2 Co., Ltd.

Technology area: Semiconductors, Circuits & Optics

3 pending office actions • 3 art units • 3 examiners • 0 of 3 (0%) have an AI response strategy ready • 8 patents granted in the last 365 days

Analysis

CSMC Technologies Fab2 Co., Ltd. operates in the Semiconductors, Circuits & Optics technology area. The portfolio currently has 4 pending office actions. These actions are distributed across 4 distinct examiners and 4 distinct art units. This wide distribution indicates that the company's current prosecution is highly decentralized across the patent office.

The busiest examiner for the company is MALSAWMA, LALRINFAMKIM HMAR. This examiner is handling 1 busiest examiner pending office action. This specific action is one of the 4 total pending office actions for the company. MALSAWMA, LALRINFAMKIM HMAR is one of the multiple individuals reviewing the company's Semiconductors, Circuits & Optics applications.

The 4 pending office actions are assigned to the distinct examiners and the distinct art units. MALSAWMA, LALRINFAMKIM HMAR is the busiest examiner with the busiest examiner pending office action. This distribution indicates that the company's prosecution is spread, with each of the 4 pending office actions being handled by a different examiner in a different art unit. Practitioners should be prepared for unique examiner perspectives and art unit requirements for each pending matter.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Portfolio Summary

3
Total Pending OAs
1
Non-Final OAs
1
Final Rejections
1
Advisory / Quayle

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

1
Hard (33%)
2
Medium (67%)
0
Easy (0%)
0
Unknown (0%)

Rejection Statute Mix

BucketCases
§103 only2 (67%)
Multi-statute (no §101)1 (33%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

0
Life Sciences
0% of docket
0
Information Tech
0% of docket
0
Communications
0% of docket
3
Semiconductors
100% of docket
0
Mechanical / Eng
0% of docket
0
Business / Other
0% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

30 h
Manual time on pending OAs
6 h
Time saved (low, 20%)
10 h
Time saved (mid, 35%)
0.3 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
MALSAWMA, LALRINFAMKIM HMAR 1 90.5% +8.8%
SENGDARA, VONGSAVANH 1 72.2% +18.4%
MARIN, JACOB RAUL 1 100.0% +0.0%

Quick Wins (2)

Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 2 ordered by deadline are shown.

App #TitleExaminerDue in
18572595 FORMING METHOD FOR FLOATING CONTACT HOLE, AND SEMICONDUCTOR DEVICE MALSAWMA, LALRINFAMKIM HMAR —
18284052 SEMICONDUCTOR DEVICE HAVING SPLIT GATE STRUCTURE AND MANUFACTURING METHOD THEREFOR MARIN, JACOB RAUL —

Hard Cases (1)

Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 1 ordered by deadline are shown.

App #TitleExaminerDue in
18567101 GGNMOS TRANSISTOR STRUCTURE, ESD PROTECTION DEVICE AND CIRCUIT SENGDARA, VONGSAVANH —

Interview Candidates (1)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 1 ordered by deadline are shown.

App #TitleExaminerDue in
18567101 GGNMOS TRANSISTOR STRUCTURE, ESD PROTECTION DEVICE AND CIRCUIT SENGDARA, VONGSAVANH —

Top Art Units

Art UnitApps
2892 1
2893 1
2818 1

Pending Office Actions

App #TitleExaminerArt UnitStatutesStatusDue inAIFiled
18572595 FORMING METHOD FOR FLOATING CONTACT HOLE, AND SEMICONDUCTOR DEVICE MALSAWMA, LALRINFAMKIM HMAR 2892 §103 Final Rejection — Pending Dec 20, 2023
18567101 GGNMOS TRANSISTOR STRUCTURE, ESD PROTECTION DEVICE AND CIRCUIT SENGDARA, VONGSAVANH 2893 §103§112 Non-Final OA — Pending Dec 05, 2023
18284052 SEMICONDUCTOR DEVICE HAVING SPLIT GATE STRUCTURE AND MANUFACTURING METHOD THEREFOR MARIN, JACOB RAUL 2818 §103 Non-Final OA — Pending Sep 25, 2023

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