Listed by the USPTO as MCDONALD, JASON ANDREW
Tech Center 2800 • Art Units: 2898
This examiner grants 62% of resolved cases
Jason Andrew McDonald has a 62.5% allowance rate across 8 resolved cases in Art Unit 2898. The median days to allowance is 1329. The interview lift is 46.7%, though this is based on a small sample size. This 46.7% lift suggests that direct engagement with the examiner is effective for resolving issues and boosting the probability of an allowance compared to the 62.5% baseline, even with limited data available.
Samsung Electronics Co., Ltd., International Business Machines Corporation, and Intel Corporation are among the companies in his docket. Akona IP PC - Intel, Cantor Colburn LLP, and Muir Patent Law, PLLC are the top firms. The 62.5% allowance rate and 1329-day median pendency provide a preliminary baseline for expectations in Tech Center 2800. For the electronics and computing companies listed, the 46.7% lift is a tactical signal. The data suggests that for these firms, oral advocacy is a productive strategy to leverage the increase in allowance likelihood across his 8 resolved cases.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18634101 | SEMICONDUCTOR PACKAGE | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18630470 | SEMICONDUCTOR PACKAGE | Final Rejection | SAMSUNG ELECTRONICS CO., LTD. |
| 18436267 | IMAGE SENSOR | Non-Final OA | Samsung Electronics Co., Ltd. |
| 18239454 | DIE BONDING APPARATUS | Final Rejection | Samsung Electronics Co., Ltd. |
| 18361892 | ELECTRO-STATIC DISCHARGE PROTECTION DEVICE | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18226606 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | Final Rejection | Samsung Electronics Co., Ltd. |
| 18360651 | PHOTOELECTRIC CONVERSION APPARATUS AND EQUIPMENT | Final Rejection | CANON KABUSHIKI KAISHA |
| 18082815 | ORGANIC PHOTODETECTOR AND ELECTRONIC APPARATUS INCLUDING THE SAME | Final Rejection | Samsung Display Co., Ltd. |
| 17999746 | MAGNETORESISTIVE EFFECT ELEMENT, SEMICONDUCTOR DEVICE, AND ELECTRONIC EQUIPMENT | Final Rejection | SONY SEMICONDUCTOR SOLUTIONS CORPORATION |
| 18460216 | Gallium Nitride Power Transistor | Non-Final OA | HUAWEI TECHNOLOGIES CO., LTD. |
| 18589093 | INTEGRATED CIRCUIT (IC) PACKAGES EMPLOYING STIFFENER STRUCTURE WITH INTEGRATED CAVITY(IES) TO ENCLOSE AN ELECTRICAL COMPONENT(S), AND RELATED FABRICATION METHODS | Non-Final OA | QUALCOMM Incorporated |
| 17972923 | COPPER FILL FOR HEAT MANAGEMENT IN INTEGRATED CIRCUIT DEVICE | Final Rejection | Intel Corporation |
| 17972975 | INTEGRATED INDUCTOR OVER TRANSISTOR LAYER | Final Rejection | Intel Corporation |
| 17943354 | TECHNOLOGIES FOR GLASS CORE INDUCTOR | Final Rejection | Intel Corporation |
| 17710658 | CHASSIS CUSTOMIZATION WITH HIGH THROUGHPUT ADDITIVE MANUFACTURED MODIFICATION STRUCTURES | Final Rejection | Intel Corporation |
| 17974047 | TRANSISTORS WITH ASYMMETRIC SOURCE/DRAIN REGIONS | Non-Final OA | International Business Machines Corporation |
| 18049301 | VIRTUAL POWER SUPPLY THROUGH WAFER BACKSIDE | Final Rejection | International Business Machines Corporation |
| 17643434 | TOP VIA INTERCONNECT STRUCTURE WITH TEXTURE SUPPRESSION LAYERS | Non-Final OA | INTERNATIONAL BUSINESS MACHINES CORPORATION |
| 18457948 | SEMICONDUCTOR DEVICE INCLUDING BACKSIDE TRANSISTORS | Final Rejection | SK hynix Inc. |
| 18519633 | SRAM HAVING CFET STACKS AND METHOD OF MANUFACTURING SAME | Non-Final OA | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
| 18455211 | REDUCED RESIDUE AT ETCHED STRUCTURE SIDEWALLS | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18483657 | FIELD EFFECT TRANSISTOR WITH ALIGNMENT MARK AND RELATED METHODS | Final Rejection | Taiwan Semiconductor Manufacturing Co., Ltd. |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy62.5% of resolved applications examined by Jason Andrew Mcdonald were allowed (8 resolved cases), compared with 80.2% across Art Unit 2898 over the last five years.
This examiner's interview lift is +46.7 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Jason Andrew Mcdonald took 1,329 days on average from filing to allowance.
Jason Andrew Mcdonald examines applications in Art Unit 2898 in Tech Center 2800 (Semiconductors, Circuits & Optics).