Technology area: Semiconductors, Circuits & Optics
7 pending office actions • 4 art units • 7 examiners • 0 of 7 (0%) have an AI response strategy ready • 12 patents granted in the last 365 days
Jcet Stats Chippac Korea Limited has 6 pending office actions in Semiconductors, Circuits & Optics. The matters are distributed among 6 distinct examiners and 4 distinct art units, indicating a broad examination footprint across the portfolio.
WINTERS, SEAN AYERS is the busiest examiner, with 1 pending matter. No listed examiner carries a larger pending allocation, so counsel may need coordinated portfolio oversight alongside matter-specific responses. The art-unit distribution also supports tracking issues by technical assignment rather than relying on a single examination pattern.
Based on the USPTO statutory response window for each pending office action. 1 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §103 only | 4 (57%) |
| Multi-statute (no §101) | 3 (43%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| WINTERS, SEAN AYERS | 1 | 88.7% | +17.9% |
| WIEGAND, TYLER J | 1 | 74.8% | +13.8% |
| MUNOZ, ANDRES F | 1 | 76.5% | +17.3% |
| TURNER, BRIAN | 1 | 83.4% | +4.1% |
| MAZUMDER, DIDARUL A | 1 | 86.6% | +7.8% |
| TRAN, TAN N | 1 | 86.9% | +9.9% |
| NETTLES, CORALIE ANN | 1 | 60.5% | +31.7% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18597878 | SEMICONDUCTOR DEVICE WITH IMPROVED HEAT DISSIPATION AND METHOD FOR MAKING THE SAME | MAZUMDER, DIDARUL A | — |
| 18395650 | ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME | TRAN, TAN N | — |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 3 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18760283 | Semiconductor Device and Method of Forming Interconnect Structure Using VFM and TCB | WINTERS, SEAN AYERS | — |
| 18670747 | SEMICONDUCTOR PACKAGE WITH IMPROVED HEAT DISSIPATION | WIEGAND, TYLER J | — |
| 18636301 | SEMICONDUCTOR PACKAGE STRIP AND METHOD FOR FORMING A SEMICONDUCTOR DEVICE | TURNER, BRIAN | — |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 4 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18469536 | METHOD FOR MAKING AN ELECTRONIC PACKAGE | NETTLES, CORALIE ANN | 22d |
| 18760283 | Semiconductor Device and Method of Forming Interconnect Structure Using VFM and TCB | WINTERS, SEAN AYERS | — |
| 18670747 | SEMICONDUCTOR PACKAGE WITH IMPROVED HEAT DISSIPATION | WIEGAND, TYLER J | — |
| 18639994 | SEMICONDUCTOR DEVICE WITH A PARTIAL SHIELDING LAYER AND A METHOD FOR MAKING THE SAME | MUNOZ, ANDRES F | — |
| Art Unit | Apps |
|---|---|
| 2812 | 3 |
| 2818 | 2 |
| 2892 | 1 |
| 2893 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 18760283 | Semiconductor Device and Method of Forming Interconnect Structure Using VFM and TCB | WINTERS, SEAN AYERS | 2892 | §103§112 | Final Rejection | — | Pending | Jul 01, 2024 |
| 18670747 | SEMICONDUCTOR PACKAGE WITH IMPROVED HEAT DISSIPATION | WIEGAND, TYLER J | 2812 | §102§112 | Non-Final OA | — | Pending | May 22, 2024 |
| 18639994 | SEMICONDUCTOR DEVICE WITH A PARTIAL SHIELDING LAYER AND A METHOD FOR MAKING THE SAME | MUNOZ, ANDRES F | 2818 | §103 | Non-Final OA | — | Pending | Apr 19, 2024 |
| 18636301 | SEMICONDUCTOR PACKAGE STRIP AND METHOD FOR FORMING A SEMICONDUCTOR DEVICE | TURNER, BRIAN | 2818 | §102§103 | Final Rejection | — | Pending | Apr 16, 2024 |
| 18597878 | SEMICONDUCTOR DEVICE WITH IMPROVED HEAT DISSIPATION AND METHOD FOR MAKING THE SAME | MAZUMDER, DIDARUL A | 2812 | §103 | Final Rejection | — | Pending | Mar 06, 2024 |
| 18395650 | ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME | TRAN, TAN N | 2812 | §103 | Final Rejection | — | Pending | Dec 25, 2023 |
| 18469536 | METHOD FOR MAKING AN ELECTRONIC PACKAGE | NETTLES, CORALIE ANN | 2893 | §103 | Non-Final OA | 22d | Pending | Sep 18, 2023 |
IP Author helps IP teams respond to office actions faster with AI-generated responses, examiner analytics, and prosecution intelligence.
Start Free TrialJcet Stats Chippac Korea Limited has 7 pending office actions as of October 2026, spread across 4 art units and 7 examiners.
Sean Ayers Winters has the most, with 1 of Jcet Stats Chippac Korea Limited's pending office actions.
Mostly Semiconductors, Circuits & Optics (USPTO Tech Center 2800), based on where its pending office actions are examined.
