Prosecution Insights
Prosecution Insights
Technology area: Semiconductors, Circuits & Optics
3 pending office actions • 3 art units • 3 examiners • 0 of 3 (0%) have an AI response strategy ready • 2 patents granted in the last 365 days
ND-HI TECHNOLOGIES LAB, INC. is active in the Semiconductors, Circuits & Optics technology area, currently navigating 3 pending office actions. This level of activity points to a portfolio with ongoing discussions at the patent office, reflecting a steady pace of intellectual property development. The company's work is being reviewed by 3 distinct examiners, which suggests that the semiconductor and circuit innovations are diverse enough to fall under different regulatory jurisdictions within the office. This distribution requires the company to manage different examiner relationships simultaneously to ensure that each application moves toward a favorable outcome.
The busiest examiner for this portfolio is TRAN, TRANG Q, who is currently responsible for 1 pending action. The use of distinct art units means that the prosecution team must be well-versed in the specific nuances of each unit's interpretation of Semiconductors, Circuits & Optics. The pending office actions represent the current hurdles the company must overcome to expand its protected technological footprint in this technical field. Practitioners should focus on the specific feedback from TRAN, TRANG Q and the other examiners to maintain a cohesive strategy across the entire Semiconductors, Circuits & Optics portfolio, as the resolution of these cases will significantly impact the company's protected status.
Based on the USPTO statutory response window for each pending office action. 1 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §103 only | 1 (33%) |
| Multi-statute (no §101) | 2 (67%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| TRAN, TRANG Q | 1 | 81.3% | +7.3% |
| GOODWIN, DAVID J | 1 | 67.4% | +16.5% |
| MULERO FLORES, ERIC MANUEL | 1 | 83.3% | +16.4% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 1 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18202310 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | TRAN, TRANG Q | 9d |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18091300 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF | GOODWIN, DAVID J | — |
| 17707703 | HIGH-YIELDING AND ULTRAFINE PITCH PACKAGES FOR LARGE-SCALE IC OR ADVANCED IC | MULERO FLORES, ERIC MANUEL | — |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18091300 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF | GOODWIN, DAVID J | — |
| 17707703 | HIGH-YIELDING AND ULTRAFINE PITCH PACKAGES FOR LARGE-SCALE IC OR ADVANCED IC | MULERO FLORES, ERIC MANUEL | — |
| Art Unit | Apps |
|---|---|
| 2811 | 1 |
| 2817 | 1 |
| 2898 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 18202310 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | TRAN, TRANG Q | 2811 | §103 | Final Rejection | 9d | Pending | May 26, 2023 |
| 18091300 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF | GOODWIN, DAVID J | 2817 | §102§103 | Non-Final OA | — | Pending | Dec 29, 2022 |
| 17707703 | HIGH-YIELDING AND ULTRAFINE PITCH PACKAGES FOR LARGE-SCALE IC OR ADVANCED IC | MULERO FLORES, ERIC MANUEL | 2898 | §102§103 | Non-Final OA | — | Pending | Mar 29, 2022 |
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