Prosecution Insights
Last updated: October 25, 2026

Soitec

Technology areas: Chemistry & Materials • Semiconductors, Circuits & Optics

13 pending office actions • 10 art units • 13 examiners • 0 of 13 (0%) have an AI response strategy ready • 33 patents granted in the last 365 days

Analysis

Soitec has 16 pending office actions in Semiconductors, Circuits & Optics. The matters span 16 examiners and 11 art units, showing broad examiner distribution and repeated use of some art-unit environments.

TUROCY, DAVID P is the busiest examiner, with 1 pending matter. No examiner has more than that stated load, so examiner-specific leverage is limited. The art-unit distribution still supports identifying recurring technical and procedural patterns across related matters.

The portfolio calls for systematic docket coordination across many examination relationships. Counsel may benefit from maintaining consistent claim terminology and disclosure positions while adapting arguments to the relevant art-unit practice.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Portfolio Summary

13
Total Pending OAs
9
Non-Final OAs
3
Final Rejections
1
Advisory / Quayle

Response Deadline Pressure

Based on the USPTO statutory response window for each pending office action. 2 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.

0
Overdue
0
Due this week
2
Due this month
0
Due in next 60 days
0
Due later

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

6
Hard (46%)
7
Medium (54%)
0
Easy (0%)
0
Unknown (0%)

Rejection Statute Mix

BucketCases
§103 only6 (46%)
§102 only1 (8%)
Multi-statute (no §101)6 (46%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

5
Life Sciences
38% of docket
0
Information Tech
0% of docket
0
Communications
0% of docket
7
Semiconductors
54% of docket
1
Mechanical / Eng
8% of docket
0
Business / Other
0% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

130 h
Manual time on pending OAs
26 h
Time saved (low, 20%)
46 h
Time saved (mid, 35%)
1.1 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
CAILLOUET, CHRISTOPHER C 1 67.8% +14.9%
RAHIM, NILUFA 1 83.6% -1.0%
HOQUE, MOHAMMAD M 1 85.3% +9.3%
KOCH, GEORGE R 1 72.8% +17.0%
ARMAND, MARC ANTHONY 1 83.6% +4.1%
SMITH JR., JIMMY R 1 65.2% +42.4%
CARTER, MICHAEL W 1 74.3% +15.4%
GROSS, CARSON 1 73.0% +21.5%
WASHVILLE, JEFFREY D 1 80.1% -4.6%
JUNGE, BRYAN R. 1 58.0% +9.0%

Quick Wins (1)

Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 1 ordered by deadline are shown.

App #TitleExaminerDue in
18886782 METHOD FOR TRANSFERRING BLOCKS FROM A DONOR SUBSTRATE ONTO A RECEIVER SUBSTRATE BY IMPLANTING IONS IN THE DONOR SUBSTRATE THROUGH A MASK, BONDING THE DONOR SUBSTRATE TO THE RECEIVER SUBSTRATE, AND DETACHING THE DONOR HOQUE, MOHAMMAD M —

Hard Cases (6)

Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 6 ordered by deadline are shown.

App #TitleExaminerDue in
18888578 STRUCTURE FOR A FRONT-FACING IMAGE SENSOR RAHIM, NILUFA —
18608134 SYSTEM FOR FRACTURING A PLURALITY OF WAFER ASSEMBLIES ARMAND, MARC ANTHONY —
18685991 METHOD FOR TRANSFERRING A USEFUL LAYER TO A FRONT FACE OF CARRIER SUBSTRATE SMITH JR., JIMMY R —
18685257 SEMICONDUCTOR STRUCTURE FOR OPTOELECTRONIC APPLICATIONS CARTER, MICHAEL W —
18461226 PROCESS FOR MANUFACTURING A TWO-DIMENSIONAL FILM OF HEXAGONAL CRYSTALLINE STRUCTURE USING EPITAXIAL GROWTH ON A TRANSFERRED THIN METAL FILM WASHVILLE, JEFFREY D —
18548616 METHOD FOR MANUFACTURING A SILICON-CARBIDE-BASED SEMICONDUCTOR STRUCTURE AND INTERMEDIATE COMPOSITE STRUCTURE JUNGE, BRYAN R. —

Interview Candidates (5)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 5 ordered by deadline are shown.

App #TitleExaminerDue in
18901953 PSEUDO-SUBSTRATE WITH IMPROVED EFFICIENCY OF USAGE OF SINGLE CRYSTAL MATERIAL CAILLOUET, CHRISTOPHER C —
18729023 METHOD FOR PRODUCING A DONOR SUBSTRATE FOR TRANSFERRING A PIEZOELECTRIC LAYER, AND METHOD FOR TRANSFERRING A PIEZOELECTRIC LAYER TO A CARRIER SUBSTRATE KOCH, GEORGE R —
18685991 METHOD FOR TRANSFERRING A USEFUL LAYER TO A FRONT FACE OF CARRIER SUBSTRATE SMITH JR., JIMMY R —
18685257 SEMICONDUCTOR STRUCTURE FOR OPTOELECTRONIC APPLICATIONS CARTER, MICHAEL W —
18287148 METHOD OF MANUFACTURING A MULTILAYER STRUCTURE GROSS, CARSON —

Top Art Units

Art UnitApps
1745 3
2893 2
2817 1
2813 1
2828 1
1746 1
1766 1
2897 1
2818 1
3729 1

Pending Office Actions

App #TitleExaminerArt UnitStatutesStatusDue inAIFiled
18901953 PSEUDO-SUBSTRATE WITH IMPROVED EFFICIENCY OF USAGE OF SINGLE CRYSTAL MATERIAL CAILLOUET, CHRISTOPHER C 1745 §103 Final Rejection — Pending Sep 30, 2024
18888578 STRUCTURE FOR A FRONT-FACING IMAGE SENSOR RAHIM, NILUFA 2893 §102§103§112 Non-Final OA — Pending Sep 18, 2024
18886782 METHOD FOR TRANSFERRING BLOCKS FROM A DONOR SUBSTRATE ONTO A RECEIVER SUBSTRATE BY IMPLANTING IONS IN THE DONOR SUBSTRATE THROUGH A MASK, BONDING THE DONOR SUBSTRATE TO THE RECEIVER SUBSTRATE, AND DETACHING THE DONOR HOQUE, MOHAMMAD M 2817 §102 Non-Final OA — Pending Sep 16, 2024
18729023 METHOD FOR PRODUCING A DONOR SUBSTRATE FOR TRANSFERRING A PIEZOELECTRIC LAYER, AND METHOD FOR TRANSFERRING A PIEZOELECTRIC LAYER TO A CARRIER SUBSTRATE KOCH, GEORGE R 1745 §103 Final Rejection — Pending Jul 15, 2024
18608134 SYSTEM FOR FRACTURING A PLURALITY OF WAFER ASSEMBLIES ARMAND, MARC ANTHONY 2813 §102§103 Non-Final OA — Pending Mar 18, 2024
18685991 METHOD FOR TRANSFERRING A USEFUL LAYER TO A FRONT FACE OF CARRIER SUBSTRATE SMITH JR., JIMMY R 1745 §102§103 Non-Final OA — Pending Feb 23, 2024
18685257 SEMICONDUCTOR STRUCTURE FOR OPTOELECTRONIC APPLICATIONS CARTER, MICHAEL W 2828 §102§103§112 Non-Final OA — Pending Feb 21, 2024
18287148 METHOD OF MANUFACTURING A MULTILAYER STRUCTURE GROSS, CARSON 1746 §103 Non-Final OA — Pending Oct 16, 2023
18461226 PROCESS FOR MANUFACTURING A TWO-DIMENSIONAL FILM OF HEXAGONAL CRYSTALLINE STRUCTURE USING EPITAXIAL GROWTH ON A TRANSFERRED THIN METAL FILM WASHVILLE, JEFFREY D 1766 §102§112 Non-Final OA — Pending Sep 05, 2023
18548616 METHOD FOR MANUFACTURING A SILICON-CARBIDE-BASED SEMICONDUCTOR STRUCTURE AND INTERMEDIATE COMPOSITE STRUCTURE JUNGE, BRYAN R. 2897 §103§112 Final Rejection — Pending Sep 01, 2023
18263802 METHOD FOR PREPARING THE RESIDUE OF A DONOR SUBSTRATE, A LAYER OF WHICH HAS BEEN REMOVED BY DELAMINATION DEGRASSE, IAN ISAAC 2818 §103 Non-Final OA 23d Pending Aug 01, 2023
17907245 PROCESS FOR MANUFACTURING A PIEZOELECTRIC STRUCTURE FOR A RADIOFREQUENCY DEVICE WHICH STRUCTURE CAN BE USED TO TRANSFER A PIEZOELECTRIC LAYER, AND PROCESS FOR TRANSFERRING SUCH A PIEZOELECTRIC LAYER CARLEY, JEFFREY T. 3729 §103 Non-Final OA — Pending Mar 17, 2023
17757822 METHOD FOR MANUFACTURING A FULLY-DEPLETED SEMICONDUCTOR-ON-INSULATOR (FD_SOI) STRUCTURE INCLUDING HEAT-TREATING AN SOI SUBSTATE HAVING A P-TYPE MONOCRYSTALLINE SEMICONDUCTOR LAYER TO FORM A P-N JUNCTION BY DIFFUSION OF DOPANTS MAI, ANH D 2893 §103 Non-Final OA 15d Pending Jun 21, 2022

Managing Soitec's Patent Portfolio?

IP Author helps IP teams respond to office actions faster with AI-generated responses, examiner analytics, and prosecution intelligence.

Start Free Trial

Frequently Asked Questions

How many pending USPTO office actions does Soitec have?

Soitec has 13 pending office actions as of October 2026, spread across 10 art units and 13 examiners.

Which USPTO examiner handles the most Soitec applications?

Christopher C Caillouet has the most, with 1 of Soitec's pending office actions.

What technology area are Soitec's patent applications in?

Mostly Semiconductors, Circuits & Optics (USPTO Tech Center 2800), based on where its pending office actions are examined.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month