Technology areas: Computing & Software • Semiconductors, Circuits & Optics
16 pending office actions • 11 art units • 16 examiners • 0 of 16 (0%) have an AI response strategy ready • 143 patents granted in the last 365 days
Synopsys Inc. has 17 pending office actions in Semiconductors, Circuits & Optics. The matters span 17 distinct examiners and 11 distinct art units, showing a broad examination footprint with repeated use of some art-unit environments.
ZHANG, LESHUI is the busiest examiner, with 1 pending matter. No examiner accounts for more than that figure, so the docket calls for application-specific prosecution management. The repeated art-unit assignments still provide a basis for identifying recurring technical or procedural issues across matters.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §101 + other | 6 (38%) |
| §103 only | 4 (25%) |
| Multi-statute (no §101) | 5 (31%) |
| No statute on record | 1 (6%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| ZHANG, LESHUI | 1 | 77.9% | +35.3% |
| CHERY, MARDOCHEE | 1 | 88.4% | +10.4% |
| PARIHAR, SUCHIN | 1 | 87.8% | +8.9% |
| SHAMSUZZAMAN, MOHAMMED | 1 | 81.2% | +55.1% |
| ALAWDI, ANWER AHMED | 1 | 75.0% | +16.7% |
| MILLER, DANIEL E | 1 | 40.0% | +38.1% |
| SINGLETARY, MICHAEL J | 1 | 83.9% | +6.0% |
| NGUYEN, NHA T | 1 | 87.2% | +18.2% |
| HOUNTON, AWADAGBE GERARD | 1 | — | — |
| KIM, EUNHEE | 1 | 77.3% | +12.2% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 1 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18535934 | INCREMENTAL GLITCH ANALYSIS FOR EFFICIENT GLITCH POWER OPTIMIZATION | NGUYEN, NHA T | — |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 8 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18941768 | AUTOMATED TRANSLATION OF DESIGN SPECIFICATIONS OF ELECTRONIC CIRCUITS | ZHANG, LESHUI | — |
| 18590646 | POWER PERFORMANCE AREA OPTIMIZATION IN DESIGN TECHNOLOGY CO-OPTIMIZATION FLOWS | PARIHAR, SUCHIN | — |
| 18415288 | ONE-TIME PROGRAMMABLE BITCELL WITH A FUSE FIELD-EFFECT TRANSISTOR | SHAMSUZZAMAN, MOHAMMED | — |
| 18415501 | ADAPTIVE AND INCREMENTAL CIRCUIT DESIGN IMPLEMENTATION | ALAWDI, ANWER AHMED | — |
| 18406476 | HIGH PERFORMANCE MONTE CARLO CIRCUIT SIMULATION | MILLER, DANIEL E | — |
| 18390410 | METHOD TO REDUCE THE HARDWARE COSTS OF EXTRACTING POWER PROFILES IN EMULATION BY USING STATISTICAL TECHNIQUES | SINGLETARY, MICHAEL J | — |
| 18499021 | METRICS FOR INSTANCE RANKING FOR CLASSIFICATION AND REGRESSION | HOUNTON, AWADAGBE GERARD | — |
| 18141251 | ADJUSTMENTS TO SUPERCONDUCTING ELECTRONIC CIRCUIT DESIGNS USING PASSIVE TRANSMISSION LINE MODELING | KIM, EUNHEE | — |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 7 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18941768 | AUTOMATED TRANSLATION OF DESIGN SPECIFICATIONS OF ELECTRONIC CIRCUITS | ZHANG, LESHUI | — |
| 18745454 | VIRTUAL MACHINE EXECUTION WITH HETEROGENOUS HOST AND VIRTUAL MACHINE INSTRUCTION SET ARCHITECTURES | CHERY, MARDOCHEE | — |
| 18415288 | ONE-TIME PROGRAMMABLE BITCELL WITH A FUSE FIELD-EFFECT TRANSISTOR | SHAMSUZZAMAN, MOHAMMED | — |
| 18415501 | ADAPTIVE AND INCREMENTAL CIRCUIT DESIGN IMPLEMENTATION | ALAWDI, ANWER AHMED | — |
| 18406476 | HIGH PERFORMANCE MONTE CARLO CIRCUIT SIMULATION | MILLER, DANIEL E | — |
| 18535934 | INCREMENTAL GLITCH ANALYSIS FOR EFFICIENT GLITCH POWER OPTIMIZATION | NGUYEN, NHA T | — |
| 18141251 | ADJUSTMENTS TO SUPERCONDUCTING ELECTRONIC CIRCUIT DESIGNS USING PASSIVE TRANSMISSION LINE MODELING | KIM, EUNHEE | — |
| Art Unit | Apps |
|---|---|
| 2851 | 5 |
| 2188 | 2 |
| 2695 | 1 |
| 2133 | 1 |
| 2897 | 1 |
| 2857 | 1 |
| 2126 | 1 |
| 2186 | 1 |
| 4100 | 1 |
| 2128 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 18941768 | AUTOMATED TRANSLATION OF DESIGN SPECIFICATIONS OF ELECTRONIC CIRCUITS | ZHANG, LESHUI | 2695 | §103§112 | Non-Final OA | — | Pending | Nov 08, 2024 |
| 18745454 | VIRTUAL MACHINE EXECUTION WITH HETEROGENOUS HOST AND VIRTUAL MACHINE INSTRUCTION SET ARCHITECTURES | CHERY, MARDOCHEE | 2133 | — | Non-Final OA | — | Pending | Jun 17, 2024 |
| 18590646 | POWER PERFORMANCE AREA OPTIMIZATION IN DESIGN TECHNOLOGY CO-OPTIMIZATION FLOWS | PARIHAR, SUCHIN | 2851 | §102§103 | Non-Final OA | — | Pending | Feb 28, 2024 |
| 18415288 | ONE-TIME PROGRAMMABLE BITCELL WITH A FUSE FIELD-EFFECT TRANSISTOR | SHAMSUZZAMAN, MOHAMMED | 2897 | §103§112 | Final Rejection | — | Pending | Jan 17, 2024 |
| 18415501 | ADAPTIVE AND INCREMENTAL CIRCUIT DESIGN IMPLEMENTATION | ALAWDI, ANWER AHMED | 2851 | §102§103 | Non-Final OA | — | Pending | Jan 17, 2024 |
| 18406476 | HIGH PERFORMANCE MONTE CARLO CIRCUIT SIMULATION | MILLER, DANIEL E | 2851 | §102§103§112 | Non-Final OA | — | Pending | Jan 08, 2024 |
| 18390410 | METHOD TO REDUCE THE HARDWARE COSTS OF EXTRACTING POWER PROFILES IN EMULATION BY USING STATISTICAL TECHNIQUES | SINGLETARY, MICHAEL J | 2857 | §101§103§112 | Non-Final OA | — | Pending | Dec 20, 2023 |
| 18535934 | INCREMENTAL GLITCH ANALYSIS FOR EFFICIENT GLITCH POWER OPTIMIZATION | NGUYEN, NHA T | 2851 | §103 | Non-Final OA | — | Pending | Dec 11, 2023 |
| 18499021 | METRICS FOR INSTANCE RANKING FOR CLASSIFICATION AND REGRESSION | HOUNTON, AWADAGBE GERARD | 2126 | §101§102§103 | Non-Final OA | — | Pending | Oct 31, 2023 |
| 18141251 | ADJUSTMENTS TO SUPERCONDUCTING ELECTRONIC CIRCUIT DESIGNS USING PASSIVE TRANSMISSION LINE MODELING | KIM, EUNHEE | 2188 | §101§103§112 | Non-Final OA | — | Pending | Apr 28, 2023 |
| 18303800 | PEFORMANCE ANALYSIS USING ARCHITECTURE MODEL OF PROCESSOR ARCHITECTURE DESIGN | HOPKINS, DAVID ANDREW | 2188 | §101§102§103§112 | Non-Final OA | — | Pending | Apr 20, 2023 |
| 18127376 | DYNAMIC CONTROL OF CIRCUIT DESIGN EMULATION | OCHOA, JUAN CARLOS | 2186 | §103 | Non-Final OA | — | Pending | Mar 28, 2023 |
| 18114933 | MACHINE-LEARNING BASED ANOMALY DETECTION SYSTEM FOR VARIOUS PROTOCOL BUS TRANSACTIONS | MORRIS, JOSEPH PATRICK | 4100 | §101§103§112 | Non-Final OA | — | Pending | Feb 27, 2023 |
| 17898088 | SUPERVISED MACHINE LEARNING BASED MEMORY AND RUNTIME PREDICTION USING DESIGN AND AUXILIARY CONSTRUCTS | STORK, KYLE R | 2128 | §101§102§103 | Final Rejection | — | Pending | Aug 29, 2022 |
| 17870662 | INPUT/OUTPUT DEVICES THAT ARE COMPATIBLE WITH GATE-ALL-AROUND TECHNOLOGY | SIPLING, KENNETH MARK | 2818 | §103 | Final Rejection | — | Pending | Jul 21, 2022 |
| 17332861 | Engineering Change Order Scenario Compression by Applying Hybrid of Live and Static Timing Views | LIN, ARIC | 2851 | §103 | Non-Final OA | — | Pending | May 27, 2021 |
IP Author helps IP teams respond to office actions faster with AI-generated responses, examiner analytics, and prosecution intelligence.
Start Free TrialSynopsys Inc. has 16 pending office actions as of October 2026, spread across 11 art units and 16 examiners.
Leshui Zhang has the most, with 1 of Synopsys Inc.'s pending office actions.
Mostly Semiconductors, Circuits & Optics (USPTO Tech Center 2800), based on where its pending office actions are examined.
