Prosecution Insights
Prosecution Insights
Technology area: Semiconductors, Circuits & Optics
5 pending office actions • 3 art units • 5 examiners • 0 of 5 (0%) have an AI response strategy ready • 6 patents granted in the last 365 days
Xintec Inc. currently manages 5 pending office actions within the Semiconductors, Circuits & Optics technology area. These actions are distributed among 5 distinct examiners, meaning that each pending matter is assigned to a different individual. The 5 pending office actions are spread across 3 distinct art units, which suggests that the filings cover several different technical sub-specialties within the semiconductor field. This distribution requires practitioners to navigate multiple administrative environments simultaneously.
MOHAMED-ALY, KAREEM M is identified as the busiest examiner for this portfolio, currently handling 1 pending office action. The 5 distinct examiners provide a variety of perspectives on the company patent portfolio, while the 3 distinct art units provide a structured framework for these examinations. With 5 pending office actions in the pipeline, Xintec Inc. maintains an active prosecution pipeline across its primary technology area. Practitioners must coordinate across the 5 distinct examiners to ensure consistent claim strategies.
Based on the USPTO statutory response window for each pending office action. 2 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §103 only | 3 (60%) |
| Multi-statute (no §101) | 2 (40%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| MOHAMED-ALY, KAREEM M | 1 | — | — |
| MOJADDEDI, OMAR F | 1 | 89.4% | +10.4% |
| CULLEN, PATRICK LAWRENCE | 1 | 83.3% | +30.0% |
| FAN, SU JYA | 1 | 75.9% | +11.1% |
| LOHAKARE, PRATIKSHA JAYANT | 1 | 82.3% | +15.3% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18149029 | CHIP PACKAGE AND MANUFACTURING METHOD THEREOF | LOHAKARE, PRATIKSHA JAYANT | 26d |
| 18491713 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME | CULLEN, PATRICK LAWRENCE | — |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18480385 | CHIP PACKAGE AND MANUFACTURING METHOD THEREOF | FAN, SU JYA | 34d |
| 18431627 | CIRCUIT SUBSTRATE IN CHIP PACKAGE AND METHOD FOR FORMING THE SAME | MOJADDEDI, OMAR F | — |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 4 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18149029 | CHIP PACKAGE AND MANUFACTURING METHOD THEREOF | LOHAKARE, PRATIKSHA JAYANT | 26d |
| 18480385 | CHIP PACKAGE AND MANUFACTURING METHOD THEREOF | FAN, SU JYA | 34d |
| 18431627 | CIRCUIT SUBSTRATE IN CHIP PACKAGE AND METHOD FOR FORMING THE SAME | MOJADDEDI, OMAR F | — |
| 18491713 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME | CULLEN, PATRICK LAWRENCE | — |
| Art Unit | Apps |
|---|---|
| 2818 | 2 |
| 2898 | 1 |
| 2899 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 18751148 | CHIP PACKAGE AND MANUFACTURING METHOD THEREOF | MOHAMED-ALY, KAREEM M | — | §103 | Non-Final OA | — | Pending | Jun 21, 2024 |
| 18431627 | CIRCUIT SUBSTRATE IN CHIP PACKAGE AND METHOD FOR FORMING THE SAME | MOJADDEDI, OMAR F | 2898 | §102§103§112 | Non-Final OA | — | Pending | Feb 02, 2024 |
| 18491713 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME | CULLEN, PATRICK LAWRENCE | 2899 | §103 | Non-Final OA | — | Pending | Oct 20, 2023 |
| 18480385 | CHIP PACKAGE AND MANUFACTURING METHOD THEREOF | FAN, SU JYA | 2818 | §102§103 | Final Rejection | 34d | Pending | Oct 03, 2023 |
| 18149029 | CHIP PACKAGE AND MANUFACTURING METHOD THEREOF | LOHAKARE, PRATIKSHA JAYANT | 2818 | §103 | Non-Final OA | 26d | Pending | Dec 30, 2022 |
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