Prosecution Insights
Last updated: October 27, 2026

David C Spalla, USPTO Patent Examiner

Listed by the USPTO as SPALLA, DAVID C

Tech Center 2800 • Art Units: 2811 2815 2818 2821 2893 2896

This examiner grants 84% of resolved cases

Analysis

SPALLA, DAVID C works in tech center 2800 and art unit 2811. The record includes 857 resolved cases, an allowance rate of 84.5%, and a median of 845 days to allowance. The substantial case volume supports a meaningful review of examiner history, and the allowance rate indicates that successful outcomes form a clear majority of the record.

Interviews are associated with a 4.7% lift in allowance rate, indicating a limited but positive recorded relationship. Taiwan Semiconductor Manufacturing Company, Ltd., Samsung Electronics Co., Ltd., and Toyoda Gosei Co., Ltd. are the leading companies. The listed firms are Haynes and Boone, LLP (24061), BIRCH STEWART KOLASCH & BIRCH, LLP, and HOFFMAN WARNICK LLC.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

84.5%
Allow Rate
+16.5% vs TC avg
886
Total Applications
+4.7%
Interview Lift
845
Avg Prosecution Days
Based on 857 resolved cases, 2023–2026

Rejection Statute Breakdown

0%
§101 Eligibility
31.4%
§102 Novelty
52.3%
§103 Obviousness
9.4%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
18626691 SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME Non-Final OA Samsung Electronics Co., Ltd.
18687829 DISPLAY SUBSTRATE AND DISPLAY APPARATUS Non-Final OA BOE Technology Group Co., Ltd.
18083994 STRESS MODULATING PATTERN CONTAINING BONDING DIELECTRIC LAYER Final Rejection International Business Machines Corporation
18917587 SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SEMICONDUCTOR DEVICE STRUCTURE Non-Final OA Taiwan Semiconductor Manufacturing Company, Ltd.
18786797 FIELD-EFFECT TRANSISTOR DEVICE WITH GATE SPACER STRUCTURE Non-Final OA Taiwan Semiconductor Manufacturing Company, Ltd.
18787005 POST-FORMATION MENDS OF DIELECTRIC FEATURES Non-Final OA Taiwan Semiconductor Manufacturing Co., Ltd.
18780150 INNER SPACER FEATURES FOR MULTI-GATE TRANSISTORS Non-Final OA Taiwan Semiconductor Manufacturing Co., Ltd.
18779444 Source/Drain Contact with Low-K Contact Etch Stop Layer and Method of Fabricating Thereof Non-Final OA Taiwan Semiconductor Manufacturing Co., Ltd.
18798180 CROSS-POINT SPIN-ORBIT TORQUE MAGNETORESISTIVE MEMORY ARRAY AND METHOD OF MAKING THE SAME Non-Final OA Sandisk Technologies, Inc.
18813074 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME Non-Final OA UNITED MICROELECTRONICS CORP.
18583397 FOLDED CASCODE LOW NOISE AMPLIFIER Non-Final OA GlobalFoundries U.S. Inc.
18670484 ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF Non-Final OA SILICONWARE PRECISION INDUSTRIES CO., LTD.

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Frequently Asked Questions

What is examiner David C Spalla's allowance rate?

84.5% of resolved applications examined by David C Spalla were allowed (857 resolved cases), compared with 72.2% across Art Unit 2811 over the last five years.

Does an interview help with examiner David C Spalla?

This examiner's interview lift is +4.7 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.

How long does examiner David C Spalla take to allow a patent?

Applications allowed by David C Spalla took 845 days on average from filing to allowance.

Which art unit does examiner David C Spalla work in?

David C Spalla examines applications in Art Unit 2811 in Tech Center 2800 (Semiconductors, Circuits & Optics).

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