Prosecution Insights
Prosecution Insights
Technology area: Computing & Software
8 pending office actions • 7 art units • 8 examiners • 0 of 8 (0%) have an AI response strategy ready • 15 patents granted in the last 365 days
Ampere Computing LLC is navigating 8 pending office actions within the Computing & Software technology area. These actions are spread across 8 distinct examiners, meaning no two pending actions are currently before the same person. The portfolio also spans 7 distinct art units, indicating a wide variety of technical classifications within the computing sector. DANIEL F MCMAHON is the busiest examiner for the portfolio with 1 pending office action.
With 8 distinct examiners and 7 distinct art units for only 8 pending actions, the prosecution is highly decentralized. This distribution suggests that the company's software and computing intellectual property is being evaluated by many different specialized groups. Managing 8 pending office actions across 8 distinct examiners requires a strategy that accounts for many individual examiner perspectives. The presence of 7 distinct art units highlights the technical breadth of the company's current filings in the Computing & Software area.
Based on the USPTO statutory response window for each pending office action. 1 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §101 + other | 1 (12%) |
| §103 only | 3 (38%) |
| Double-patenting only | 1 (12%) |
| Multi-statute (no §101) | 3 (38%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| MCMAHON, DANIEL F | 1 | 89.7% | +2.3% |
| NGUYEN, STEVE N | 1 | 74.4% | +19.6% |
| ABAD, FARLEY J | 1 | 86.3% | +5.3% |
| CHAN, TRACY C | 1 | 79.3% | -0.4% |
| TALUKDAR, ARVIND | 1 | 80.6% | +4.2% |
| KIM, HYUN SOO | 1 | 88.6% | +13.2% |
| AQUINO, WYNUEL S | 1 | 78.9% | +21.7% |
| MARTINEZ, TOMMY NMN | 1 | 9.1% | -11.1% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 2 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 19097656 | COMPONENT DIE VALIDATION BUILT-IN SELF-TEST (VBIST) ENGINE | MCMAHON, DANIEL F | — |
| 18773245 | MULTI-SOCKET COMPUTING SYSTEM EMPLOYING A PARALLELIZED BOOT ARCHITECTURE WITH PARTIALLY CONCURRENT PROCESSOR BOOT-UP OPERATIONS, AND RELATED METHODS | KIM, HYUN SOO | — |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 4 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18490622 | MECHANISM FOR FINE-GRAINED DEVICE POWER ATTRIBUTION TO SOFTWARE ENTITIES | AQUINO, WYNUEL S | 34d |
| 19033150 | DYNAMIC CONTROL OF PREFETCHING BASED ON PREFETCHING ACCURACY IN A COMPUTING SYSTEM | ABAD, FARLEY J | — |
| 18812901 | VIRTUAL TO PHYSICAL PARTIAL TRANSLATION CACHE FOR ACCELERATING VIRTUALIZED PAGE TABLE WALKS | TALUKDAR, ARVIND | — |
| 17472259 | METHOD AND SYSTEM FOR SECURE BOOT AND RMA INTERVENTION | MARTINEZ, TOMMY NMN | — |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 3 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18490622 | MECHANISM FOR FINE-GRAINED DEVICE POWER ATTRIBUTION TO SOFTWARE ENTITIES | AQUINO, WYNUEL S | 34d |
| 19049825 | METHOD AND SYSTEM FOR TESTING SEMICONDUCTOR CIRCUITS | NGUYEN, STEVE N | — |
| 18773245 | MULTI-SOCKET COMPUTING SYSTEM EMPLOYING A PARALLELIZED BOOT ARCHITECTURE WITH PARTIALLY CONCURRENT PROCESSOR BOOT-UP OPERATIONS, AND RELATED METHODS | KIM, HYUN SOO | — |
| Art Unit | Apps |
|---|---|
| 2114 | 1 |
| 2181 | 1 |
| 2138 | 1 |
| 2132 | 1 |
| 2176 | 1 |
| 2199 | 1 |
| 2400 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 19097656 | COMPONENT DIE VALIDATION BUILT-IN SELF-TEST (VBIST) ENGINE | MCMAHON, DANIEL F | — | DP | Non-Final OA | — | Pending | Apr 01, 2025 |
| 19049825 | METHOD AND SYSTEM FOR TESTING SEMICONDUCTOR CIRCUITS | NGUYEN, STEVE N | 2114 | §103Other | Non-Final OA | — | Pending | Feb 10, 2025 |
| 19033150 | DYNAMIC CONTROL OF PREFETCHING BASED ON PREFETCHING ACCURACY IN A COMPUTING SYSTEM | ABAD, FARLEY J | 2181 | §102§103 | Final Rejection | — | Pending | Jan 21, 2025 |
| 18812908 | HARDWARE STRUCTURES AND TECHNIQUES FOR REPLAYING PREFETCH VIRTUAL ADDRESSES | CHAN, TRACY C | 2138 | §103 | Final Rejection | — | Pending | Aug 22, 2024 |
| 18812901 | VIRTUAL TO PHYSICAL PARTIAL TRANSLATION CACHE FOR ACCELERATING VIRTUALIZED PAGE TABLE WALKS | TALUKDAR, ARVIND | 2132 | §103§112 | Non-Final OA | — | Pending | Aug 22, 2024 |
| 18773245 | MULTI-SOCKET COMPUTING SYSTEM EMPLOYING A PARALLELIZED BOOT ARCHITECTURE WITH PARTIALLY CONCURRENT PROCESSOR BOOT-UP OPERATIONS, AND RELATED METHODS | KIM, HYUN SOO | 2176 | §103 | Non-Final OA | — | Pending | Jul 15, 2024 |
| 18490622 | MECHANISM FOR FINE-GRAINED DEVICE POWER ATTRIBUTION TO SOFTWARE ENTITIES | AQUINO, WYNUEL S | 2199 | §101§103 | Final Rejection | 34d | Pending | Oct 19, 2023 |
| 17472259 | METHOD AND SYSTEM FOR SECURE BOOT AND RMA INTERVENTION | MARTINEZ, TOMMY NMN | 2400 | §102§103§112 | Non-Final OA | — | Pending | Sep 10, 2021 |
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