Prosecution Insights
Last updated: October 25, 2026

Shanghai Huali Microelectronics Corporation

Technology area: Semiconductors, Circuits & Optics

18 pending office actions • 13 art units • 17 examiners • 0 of 18 (0%) have an AI response strategy ready • 53 patents granted in the last 365 days

Analysis

Shanghai Huali Microelectronics Corporation has 17 pending office actions in Semiconductors, Circuits & Optics. The matters involve 16 distinct examiners and 12 distinct art units, reflecting a portfolio spread across numerous examination assignments and technical groups.

CHEN, DAVID Z is the busiest examiner, with 2 pending matters. The limited concentration at the busiest examiner indicates that most prosecution activity is distributed among other examiner relationships, so centralized docket control and consistent technical positions are important.

The difference between examiner and art-unit counts means some art units contain matters handled by more than one examiner. That structure creates an opportunity to coordinate unit-specific prior-art analysis while preserving separate examiner response strategies.

For counsel, the principal management issue is breadth of coordination rather than reliance on a single examiner dialogue. Reviewing related claim language and disclosure across the art-unit groupings can help identify recurring issues before responses are filed.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Portfolio Summary

18
Total Pending OAs
10
Non-Final OAs
2
Final Rejections
6
Advisory / Quayle

Response Deadline Pressure

Based on the USPTO statutory response window for each pending office action. 3 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.

2
Overdue
0
Due this week
0
Due this month
1
Due in next 60 days
0
Due later

Deadline Fire Line

Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 3 of the docket's apps have a known mailing date.

-30dToday30d60d90d120d
Overdue (2)Due ≤ 60 days (1)

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

11
Hard (61%)
7
Medium (39%)
0
Easy (0%)
0
Unknown (0%)

Rejection Statute Mix

BucketCases
§101 only1 (6%)
§101 + other1 (6%)
§103 only7 (39%)
Multi-statute (no §101)9 (50%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

1
Life Sciences
6% of docket
0
Information Tech
0% of docket
1
Communications
6% of docket
13
Semiconductors
72% of docket
2
Mechanical / Eng
11% of docket
1
Business / Other
6% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

180 h
Manual time on pending OAs
36 h
Time saved (low, 20%)
63 h
Time saved (mid, 35%)
1.6 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
CHEN, DAVID Z 2 45.0% +50.2%
SLUTSKER, JULIA 1 76.9% +12.7%
RAHMAN, MOHAMMAD A 1 87.2% +10.6%
LU, JIONG-PING 1 83.6% +7.9%
ESQUINO, CALEB LOGAN 1 58.1% +6.0%
LUONG, DUY HAN 1 95.1% +7.7%
MANG, LAL C 1 75.6% +18.1%
BRADFORD, PETER 1 80.9% +4.4%
CHOI, WOO H 1 83.7% -4.4%
NGUYEN, DUSTIN T 1 72.6% +17.8%

Quick Wins (1)

Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 1 ordered by deadline are shown.

App #TitleExaminerDue in
18744498 THREE-PORT SRAM CIRCUIT LUONG, DUY HAN —

Hard Cases (11)

Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 8 ordered by deadline are shown.

App #TitleExaminerDue in
17877324 Method for Manufacturing Integrated Metal Resistance Layer PRIDEMORE, NATHAN ANDREW 1d overdue
18810415 METHOD FOR FORMING HYBRID SUBSTRATE OF SOI WAFER SLUTSKER, JULIA —
18783225 CIS PIXEL READOUT STRUCTURE AND METHOD FOR FABRICATING THE SAME RAHMAN, MOHAMMAD A —
18778752 POLYSILICON GATE ETCH METHOD LU, JIONG-PING —
18778736 METHOD FOR REDUCING RESISTANCE OF CONTACT CHEN, DAVID Z —
18778718 METHOD AND STRUCTURE FOR IMPROVING ESD PERFORMANCE OF METAL-GATE HIGH-VOLTAGE DEVICES CHEN, DAVID Z —
18644604 METHOD FOR REDUCING MEASUREMENT ERRORS IN CRITICAL PATTERN DIMENSIONS OF POLYCRYSTAL LAYERS MANG, LAL C —
18612961 SUPER FLASH AND METHOD FOR MANUFACTURING SAME BRADFORD, PETER —

Interview Candidates (6)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 6 ordered by deadline are shown.

App #TitleExaminerDue in
18810415 METHOD FOR FORMING HYBRID SUBSTRATE OF SOI WAFER SLUTSKER, JULIA —
18783225 CIS PIXEL READOUT STRUCTURE AND METHOD FOR FABRICATING THE SAME RAHMAN, MOHAMMAD A —
18778736 METHOD FOR REDUCING RESISTANCE OF CONTACT CHEN, DAVID Z —
18778718 METHOD AND STRUCTURE FOR IMPROVING ESD PERFORMANCE OF METAL-GATE HIGH-VOLTAGE DEVICES CHEN, DAVID Z —
18644604 METHOD FOR REDUCING MEASUREMENT ERRORS IN CRITICAL PATTERN DIMENSIONS OF POLYCRYSTAL LAYERS MANG, LAL C —
18406371 Wafer Temperature Control System and Control Method, Computer Device, and Storage Medium NGUYEN, DUSTIN T —

Top Art Units

Art UnitApps
2897 3
2898 2
2857 2
2891 1
1713 1
2815 1
2677 1
2825 1
2827 1
3745 1

Pending Office Actions

App #TitleExaminerArt UnitStatutesStatusDue inAIFiled
18810415 METHOD FOR FORMING HYBRID SUBSTRATE OF SOI WAFER SLUTSKER, JULIA 2891 §103§112 Non-Final OA — Pending Aug 20, 2024
18783225 CIS PIXEL READOUT STRUCTURE AND METHOD FOR FABRICATING THE SAME RAHMAN, MOHAMMAD A 2898 §103§112 Non-Final OA — Pending Jul 24, 2024
18778752 POLYSILICON GATE ETCH METHOD LU, JIONG-PING 1713 §102§103 Non-Final OA — Pending Jul 19, 2024
18778736 METHOD FOR REDUCING RESISTANCE OF CONTACT CHEN, DAVID Z 2815 §102§103 Non-Final OA — Pending Jul 19, 2024
18778718 METHOD AND STRUCTURE FOR IMPROVING ESD PERFORMANCE OF METAL-GATE HIGH-VOLTAGE DEVICES CHEN, DAVID Z — §103§112 Non-Final OA — Pending Jul 19, 2024
18748253 METHOD FOR IMPROVING QUALITY OF CDSEM IMAGES ESQUINO, CALEB LOGAN 2677 §103 Non-Final OA — Pending Jun 20, 2024
18744498 THREE-PORT SRAM CIRCUIT LUONG, DUY HAN 2825 §103 Final Rejection — Pending Jun 14, 2024
18644604 METHOD FOR REDUCING MEASUREMENT ERRORS IN CRITICAL PATTERN DIMENSIONS OF POLYCRYSTAL LAYERS MANG, LAL C 2857 §101 Final Rejection — Pending Apr 24, 2024
18612961 SUPER FLASH AND METHOD FOR MANUFACTURING SAME BRADFORD, PETER 2897 §103§112 Non-Final OA — Pending Mar 21, 2024
18582183 STATIC RANDOM-ACCESS MEMORY AND INTEGRATED CIRCUIT LAYOUT THEREOF CHOI, WOO H 2827 §102§103 Non-Final OA — Pending Feb 20, 2024
18406371 Wafer Temperature Control System and Control Method, Computer Device, and Storage Medium NGUYEN, DUSTIN T 3745 §103§112 Non-Final OA — Pending Jan 08, 2024
18406465 Wafer Polishing Locating Ring and Chemical Mechanical Polishing Device DION, MARCEL T 3723 §103 Non-Final OA 36d Pending Jan 08, 2024
18465011 METHOD FOR MEASURING THICKNESS OF SILICON EPITAXIAL LAYER WEGNER, AARON MICHAEL 2897 §103 Non-Final OA — Pending Sep 11, 2023
18175092 METHOD FOR MANUFACTURING SIGMA-SHAPED GROOVE JUNGE, BRYAN R. 2897 §103 Non-Final OA 29d overdue Pending Feb 27, 2023
17877324 Method for Manufacturing Integrated Metal Resistance Layer PRIDEMORE, NATHAN ANDREW 2898 §103§112 Non-Final OA 1d overdue Pending Jul 29, 2022
17839313 METHOD FOR MANUFACTURING METAL GATE MOS TRANSISTOR NIELSEN, DEREK LANG 2899 §103 Non-Final OA — Pending Jun 13, 2022
18369939 Method for Monitoring Ghost Image of Illumination Unit of Lithography Machine CHOWDHURY, TARIFUR RASHID 2877 §103 Non-Final OA — Pending Sep 19, 2023
18368137 Method and System for Analyzing Wafer Angle in Semiconductor Integrated Circuit Manufacturing WALSH, RYAN D 2857 §101§102§112 Non-Final OA — Pending Sep 14, 2023

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Frequently Asked Questions

How many pending USPTO office actions does Shanghai Huali Microelectronics Corporation have?

Shanghai Huali Microelectronics Corporation has 18 pending office actions as of October 2026, spread across 13 art units and 17 examiners.

Which USPTO examiner handles the most Shanghai Huali Microelectronics Corporation applications?

David Z Chen has the most, with 2 of Shanghai Huali Microelectronics Corporation's pending office actions.

What technology area are Shanghai Huali Microelectronics Corporation's patent applications in?

Mostly Semiconductors, Circuits & Optics (USPTO Tech Center 2800), based on where its pending office actions are examined.

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