Listed by the USPTO as FAN, SU JYA
Tech Center 2800 • Art Units: 2818 2823 2894
This examiner grants 76% of resolved cases
FAN, SU JYA is assigned to technology center 2800 and art unit 2818. The record contains 956 resolved cases, an allowance rate of 75.8%, an interview lift of 11.1%, and a median of 958 days to allowance. The high case volume supports a stable reading of a favorable allowance outcome. The interview measure is positive but modest, so it is better viewed as a supporting tactic.
Taiwan Semiconductor Manufacturing Company, Ltd., Samsung Electronics Co., Ltd., and Intel Corporation appear among the listed companies. The associated firms are FISH & RICHARDSON P.C. (TC), SCHWABE, WILLIAMSON & WYATT, P.C., and STERNE, KESSLER, GOLDSTEIN & FOX P.L.L.C. Written claim strategy should remain central, with interviews used to address focused issues. The median timing provides a practical reference for portfolio scheduling.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18787011 | METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE BY USING CARRIER SUBSTRATE | Non-Final OA | Samsung Electronics Co., Ltd. |
| 18735409 | SEMICONDUCTOR PACKAGE | Non-Final OA | Samsung Electronics Co., Ltd. |
| 18426868 | SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME | Non-Final OA | SAMSUNG ELECTRONICS CO., LTD. |
| 18518566 | SEMICONDUCTOR DEVICE | Final Rejection | FUJI ELECTRIC CO., LTD. |
| 18096174 | THIN SYSTEM-IN-PACKAGE WITH SHIELDED STEPPED MOLD | Final Rejection | Apple Inc. |
| 18527096 | DISPLAY DEVICE | Final Rejection | Samsung Display Co., Ltd. |
| 17666911 | POWER STRUCTURE, PREPARATION METHOD, AND DEVICE | Non-Final OA | HUAWEI TECHNOLOGIES CO., LTD. |
| 18460621 | SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAME | Final Rejection | STATS ChipPAC Pte. Ltd. |
| 18071116 | RBTV IMPROVEMENT FOR GLASS CORE ARCHITECTURES | Final Rejection | Intel Corporation |
| 17943915 | COPPER CLAD LAMINATE (CCL) FOR PLATING PADS WITHIN A GLASS CAVITY FOR GLASS CORE APPLICATIONS | Final Rejection | Intel Corporation |
| 17448716 | Semiconductor Die, Semiconductor Device and Method for Forming a Semiconductor Die | Final Rejection | Intel Corporation |
| 18069290 | ELECTRONIC DEVICE | Final Rejection | InnoLux Corporation |
| 17894063 | SEMICONDUCTOR PACKAGING WITH REDUCED STANDOFF HEIGHT | Non-Final OA | Micron Technology, Inc. |
| 17891535 | SOLDER JOINT DESIGN FOR IMPROVED PACKAGE RELIABILITY | Non-Final OA | Micron Technology, Inc. |
| 18787578 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME | Non-Final OA | SK hynix Inc. |
| 18623049 | SEMICONDUCTOR DEVICE INCLUDING CONDUCTIVE BONDING PATTERN | Non-Final OA | SK hynix Inc. |
| 18414969 | SEMICONDUCTOR DEVICE | Final Rejection | ROHM CO., LTD. |
| 18642522 | DUAL PLASMA TREATMENT PROCESS | Non-Final OA | Applied Materials, Inc. |
| 18238954 | SACRIFICIAL LAYER FOR FORMING MERGED HIGH ASPECT RATIO CONTACTS IN 3D NAND MEMORY DEVICE | Non-Final OA | Applied Materials, Inc. |
| 18591344 | HEMT DEVICE HAVING A REDUCED GATE LEAKAGE AND MANUFACTURING PROCESS THEREOF | Non-Final OA | STMicroelectronics International N.V. |
| 18226409 | INTEGRATED CIRCUIT PACKAGE | Non-Final OA | STMicroelectronics (Grenoble 2) SAS |
| 18790831 | Fin-Based Field Effect Transistors | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18753139 | METHOD FOR FORMING CHIP PACKAGE STRUCTURE WITH MULTIPLE GAP-FILLING LAYERS | Non-Final OA | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
| 18742353 | MULTI-BIT DEVICE, LAYOUT, AND METHOD | Non-Final OA | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
| 18642897 | GAIN-CELL RANDOM ACCESS MEMORY WITH ENHANCED RETENTION | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18500896 | SEMICONDUCTOR DEVICE AND METHODS OF FORMATION | Final Rejection | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18784233 | HIGH EFFICIENCY HEAT DISSIPATION USING DISCRETE THERMAL INTERFACE MATERIAL FILMS | Non-Final OA | Taiwan Semiconductor Manufacturing Co., Ltd. |
| 18581708 | PRINTED CIRCUIT BOARD | Non-Final OA | SAMSUNG ELECTRO-MECHANICS CO., LTD. |
| 17957444 | CONNECTING A CHIPLET TO AN INTERPOSER DIE AND TO A PACKAGE INTERFACE USING A SPACER INTERCONNECT COUPLED TO A PORTION OF THE CHIPLET | Final Rejection | ADVANCED MICRO DEVICES, INC. |
| 18488628 | ARC PREVENTION FOR BONDED WAFERS OF A CHIP STACK | Final Rejection | SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy75.8% of resolved applications examined by Su Jya Fan were allowed (956 resolved cases), compared with 85.2% across Art Unit 2818 over the last five years.
This examiner's interview lift is +11.1 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Su Jya Fan took 958 days on average from filing to allowance.
Su Jya Fan examines applications in Art Unit 2818 in Tech Center 2800 (Semiconductors, Circuits & Optics).
