Listed by the USPTO as SRINIVASAN, SESHA SAIRAMAN
Tech Center 2800 • Art Units: 2812 2817
This examiner grants 69% of resolved cases
SRINIVASAN, SESHA SAIRAMAN works in USPTO Technology Center 2800, Art Unit 2812. The profile covers 52 resolved cases, with an allowance rate of 69.2% and a median of 1345 days to allowance. Interview lift is 25.0%, indicating a meaningful associated improvement in a record that otherwise shows a favorable allowance rate and a long median prosecution period.
The listed companies are Intel Corporation, Qualcomm Incorporated, and Taiwan Semiconductor Manufacturing Company, Ltd. The leading firms are Viering, Jentschura & Partner mbB - Int, Akona IP PC - Intel, and CHRISTENSEN O'CONNOR JOHNSON KINDNESS PLLC. Practitioners should account for the limited case volume while using interviews and timing as central planning considerations.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 18060180 | IMAGE SENSOR SUBSTRATE AND IMAGE SENSOR INCLUDING THE SAME | Non-Final OA | Samsung Electronics Co., Ltd. |
| 18530291 | FRAME STRUCTURES IN SEMICONDUCTOR PACKAGES | Final Rejection | Apple Inc. |
| 18394347 | VERTICAL FIELD-EFFECT TRANSISTOR STRUCTURE AND METHOD FOR PRODUCING A VERTICAL FIELD-EFFECT TRANSISTOR STRUCTURE | Non-Final OA | Robert Bosch GmbH |
| 18080715 | MULTI-LAYER CHIP ARCHITECTURE AND FABRICATION | Non-Final OA | Google LLC |
| 18248732 | SOLID-STATE IMAGING DEVICE | Non-Final OA | SONY SEMICONDUCTOR SOLUTIONS CORPORATION |
| 18739185 | HIGH-BANDWIDTH MEMORY (HBM) PACKAGE-ON-PACKAGE (POP) DYNAMIC RANDOM-ACCESS MEMORY (DRAM) WITH SEMICONDUCTOR PILLARS | Non-Final OA | QUALCOMM Incorporated |
| 18465717 | INTEGRATED DEVICE COMPRISING A PILLAR SHELL INTERCONNECT AND AN INNER SOLDER INTERCONNECT | Final Rejection | QUALCOMM Incorporated |
| 18085281 | DRY FILM PHOTORESIST WET LAMINATION AND METHOD | Final Rejection | Intel Corporation |
| 17975654 | LIQUID METAL SHIELD FOR FINE PITCH INTERCONNECTS | Final Rejection | Intel Corporation |
| 18050527 | PACKAGE EDGE PASSIVE COMPONENT ARRAY FOR IMPROVED POWER INTEGRITY | Final Rejection | Intel Corporation |
| 18047033 | PACKAGE SUBSTRATE WITH DUAL DAMASCENE BASED SELF-ALIGNED VIAS | Non-Final OA | Intel Corporation |
| 18389512 | POWER MODULE | Non-Final OA | Kia Corporation |
| 18499383 | SEMICONDUCTOR PACKAGE STRUCTURE | Non-Final OA | MEDIATEK INC. |
| 18123613 | BACKSIDE POWER ISLANDS FOR BACKSIDE POWER APPLICATIONS | Non-Final OA | International Business Machines Corporation |
| 18237059 | THERMAL SPREADER | Final Rejection | SK Hynix NAND Product Solutions Corp. (dba Solidigm) |
| 17795198 | SEMICONDUCTOR DEVICE | Non-Final OA | ROHM CO., LTD. |
| 18555342 | METHODS AND APPLICATIONS OF NOVEL AMORPHOUS HIGH-K METAL-OXIDE DIELECTRICS BY SUPER-CYCLE ATOMIC LAYER DEPOSITION | Non-Final OA | Applied Materials, Inc. |
| 17838253 | SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME | Final Rejection | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 17832443 | Passive Device Structure | Final Rejection | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18435227 | METHOD AND APPARATUS FOR MANUFACTURING SEMICONDUCTOR CHIP WITH CHIP OUTLINE OF VARIOUS SHAPES AT WAFER LEVEL | Non-Final OA | SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION |
| 18473998 | POWER MODULE STRUCTURE WITH CLIP SUBSTRATE MEMBER | Final Rejection | SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC |
| 17658031 | CUTTING METHOD OF WAFER | Final Rejection | DISCO CORPORATION |
IP Author analyzes examiner patterns and generates tailored response strategies with the highest chance of allowance.
Build Your Strategy69.2% of resolved applications examined by Sesha Sairaman Srinivasan were allowed (52 resolved cases), compared with 82.1% across Art Unit 2812 over the last five years.
This examiner's interview lift is +25.0 percentage points: the difference in allowance rate between resolved applications that had an examiner interview and those that did not.
Applications allowed by Sesha Sairaman Srinivasan took 1,345 days on average from filing to allowance.
Sesha Sairaman Srinivasan examines applications in Art Unit 2812 in Tech Center 2800 (Semiconductors, Circuits & Optics).
