Prosecution Insights
Prosecution Insights
Technology area: Computing & Software
16 pending office actions • 5 art units • 15 examiners • 0 of 16 (0%) have an AI response strategy ready • 55 patents granted in the last 365 days
Based on the USPTO statutory response window for each pending office action. 4 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.
Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 4 of the docket's apps have a known mailing date.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §101 only | 2 (12%) |
| §101 + other | 5 (31%) |
| §103 only | 2 (12%) |
| §112 only | 2 (12%) |
| Double-patenting only | 3 (19%) |
| Multi-statute (no §101) | 2 (12%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| ZAMAN, FAISAL M | 2 | 67.2% | +13.5% |
| HASSAN, AURANGZEB | 1 | 80.3% | +17.0% |
| HUSON, ZACHARY K | 1 | 89.3% | +6.5% |
| SNYDER, STEVEN G | 1 | 80.4% | -8.5% |
| CHU, GABRIEL L | 1 | 78.8% | -2.2% |
| DOMAN, SHAWN | 1 | 64.9% | +26.6% |
| METZGER, MICHAEL J | 1 | 90.7% | +7.6% |
| TSENG, CHENG YUAN | 1 | 84.1% | +15.5% |
| CHEN, SIBIN | 1 | 86.6% | +5.2% |
| LEE, ADAM | 1 | 84.1% | +61.0% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 4 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18624056 | Flip-Flop With Trigger Edge Determined By Latch Order | CHEN, SIBIN | 68d |
| 19232544 | Estimating a Cost of Placing and Routing a Logical Edge onto a Reconfigurable Processor | HASSAN, AURANGZEB | — |
| 19184611 | MULTIPLE CONTEXTS FOR A COMPUTE UNIT IN A RECONFIGURABLE DATA PROCESSOR | HUSON, ZACHARY K | — |
| 19062301 | PEER-TO-PEER ROUTE THROUGH IN A RECONFIGURABLE COMPUTING SYSTEM | SNYDER, STEVEN G | — |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 8 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 18128104 | SEARCHING NEURAL NETWORK PIPELINES BASED ON NAMED MATRIX DIMENSIONS | SMITH, CHENECA | 49d |
| 18367764 | Estimating Resource Costs for Computing Tasks for a Reconfigurable Dataflow Computing System | KABIR, MOHAMMAD H | 63d |
| 19081647 | COMPILER THAT GENERATES CONFIGURATION INFORMATION FOR CONFIGURING AN INTEGRATED CIRCUIT TO MITIGATE INDUCTIVE-INDUCED VOLTAGE DROOP | ZAMAN, FAISAL M | — |
| 19043391 | HARDWARE FAULT DETECTION AND RECOVERY IN A RECONFIGURABLE DATAFLOW ARCHITECTURE | CHU, GABRIEL L | — |
| 19020313 | REUSING SELECT COMPUTED VALUES DURING LAYER NORMALIZATION FOR LARGE MODELS | METZGER, MICHAEL J | — |
| 18974291 | COMPUTATIONAL NODES FUSION IN A RECONFIGURABLE DATA PROCESSOR | TSENG, CHENG YUAN | — |
| 18614639 | DATA TRANSFER IN DATAFLOW COMPUTING SYSTEMS USING AN INTELLIGENT DYNAMIC TRANSFER ENGINE | LEE, ADAM | — |
| 18105695 | EXPLOITING SHARED DIMENSIONS IN MATRIX COMPUTATIONS | LE, PHAT NGOC | — |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 6 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 19232544 | Estimating a Cost of Placing and Routing a Logical Edge onto a Reconfigurable Processor | HASSAN, AURANGZEB | — |
| 19097394 | Sorting and Placing Nodes of an Operation Unit Graph onto a Reconfigurable Processor | ZAMAN, FAISAL M | — |
| 19081647 | COMPILER THAT GENERATES CONFIGURATION INFORMATION FOR CONFIGURING AN INTEGRATED CIRCUIT TO MITIGATE INDUCTIVE-INDUCED VOLTAGE DROOP | ZAMAN, FAISAL M | — |
| 19032192 | RECONFIGURABLE DATAFLOW COMPUTING SYSTEMS WITH EFFICIENT SOFTMAX FUNCTIONS | DOMAN, SHAWN | — |
| 18974291 | COMPUTATIONAL NODES FUSION IN A RECONFIGURABLE DATA PROCESSOR | TSENG, CHENG YUAN | — |
| 18614639 | DATA TRANSFER IN DATAFLOW COMPUTING SYSTEMS USING AN INTELLIGENT DYNAMIC TRANSFER ENGINE | LEE, ADAM | — |
| Art Unit | Apps |
|---|---|
| 2192 | 2 |
| 2114 | 1 |
| 2183 | 1 |
| 2896 | 1 |
| 2151 | 1 |
| App # | Title | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|
| 19232544 | Estimating a Cost of Placing and Routing a Logical Edge onto a Reconfigurable Processor | HASSAN, AURANGZEB | — | §103Other | Non-Final OA | — | Pending | Jun 09, 2025 |
| 19184611 | MULTIPLE CONTEXTS FOR A COMPUTE UNIT IN A RECONFIGURABLE DATA PROCESSOR | HUSON, ZACHARY K | — | DP | Non-Final OA | — | Pending | Apr 21, 2025 |
| 19097394 | Sorting and Placing Nodes of an Operation Unit Graph onto a Reconfigurable Processor | ZAMAN, FAISAL M | — | DP | Non-Final OA | — | Pending | Apr 01, 2025 |
| 19081647 | COMPILER THAT GENERATES CONFIGURATION INFORMATION FOR CONFIGURING AN INTEGRATED CIRCUIT TO MITIGATE INDUCTIVE-INDUCED VOLTAGE DROOP | ZAMAN, FAISAL M | — | §103§112Other | Non-Final OA | — | Pending | Mar 17, 2025 |
| 19062301 | PEER-TO-PEER ROUTE THROUGH IN A RECONFIGURABLE COMPUTING SYSTEM | SNYDER, STEVEN G | — | DP | Non-Final OA | — | Pending | Feb 25, 2025 |
| 19043391 | HARDWARE FAULT DETECTION AND RECOVERY IN A RECONFIGURABLE DATAFLOW ARCHITECTURE | CHU, GABRIEL L | 2114 | §101§102§103 | Final Rejection | — | Pending | Jan 31, 2025 |
| 19032192 | RECONFIGURABLE DATAFLOW COMPUTING SYSTEMS WITH EFFICIENT SOFTMAX FUNCTIONS | DOMAN, SHAWN | 2183 | §112Other | Non-Final OA | — | Pending | Jan 20, 2025 |
| 19020313 | REUSING SELECT COMPUTED VALUES DURING LAYER NORMALIZATION FOR LARGE MODELS | METZGER, MICHAEL J | — | §101§103 | Non-Final OA | — | Pending | Jan 14, 2025 |
| 18974291 | COMPUTATIONAL NODES FUSION IN A RECONFIGURABLE DATA PROCESSOR | TSENG, CHENG YUAN | — | §103§112Other | Non-Final OA | — | Pending | Dec 09, 2024 |
| 18624056 | Flip-Flop With Trigger Edge Determined By Latch Order | CHEN, SIBIN | 2896 | §112 | Non-Final OA | 68d | Pending | Apr 01, 2024 |
| 18614639 | DATA TRANSFER IN DATAFLOW COMPUTING SYSTEMS USING AN INTELLIGENT DYNAMIC TRANSFER ENGINE | LEE, ADAM | — | §101 | Non-Final OA | — | Pending | Mar 23, 2024 |
| 18367764 | Estimating Resource Costs for Computing Tasks for a Reconfigurable Dataflow Computing System | KABIR, MOHAMMAD H | 2192 | §101§103 | Final Rejection | 63d | Pending | Sep 13, 2023 |
| 18128104 | SEARCHING NEURAL NETWORK PIPELINES BASED ON NAMED MATRIX DIMENSIONS | SMITH, CHENECA | 2192 | §101 | Non-Final OA | 49d | Pending | Mar 29, 2023 |
| 18105695 | EXPLOITING SHARED DIMENSIONS IN MATRIX COMPUTATIONS | LE, PHAT NGOC | — | §101§103Other | Non-Final OA | — | Pending | Feb 03, 2023 |
| 18095128 | DATAFLOW ARCHITECTURE PROCESSOR STATICALLY RECONFIGURABLE TO PERFORM N-DIMENSIONAL AFFINE TRANSFORMATION IN A TILED MANNER | HUTCHINSON, FRANK | — | §101§112 | Non-Final OA | — | Pending | Jan 10, 2023 |
| 17824830 | Matrix Multiplication on Coarse-grained Computing Grids | RIVERA, MARIA DE JESUS | 2151 | §103 | Non-Final OA | 33d | Pending | May 25, 2022 |
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