Prosecution Insights
Last updated: October 25, 2026

Vanguard International Semiconductor Corporation

Technology area: Semiconductors, Circuits & Optics

12 pending office actions • 10 art units • 12 examiners • 0 of 12 (0%) have an AI response strategy ready • 46 patents granted in the last 365 days

Analysis

Vanguard International Semiconductor Corporation has 12 pending office actions in Semiconductors, Circuits & Optics. The matters are assigned to 12 examiners across 10 art units, indicating broad distribution across both examiner and technical assignments.

NELSON, JACOB THEODORE is the busiest examiner, with 1 pending matter. No examiner has a larger reported share, so portfolio management should emphasize coordinated docket control rather than a single examiner strategy. The ten art units also support art-unit-specific review of recurring semiconductor and optics issues.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Portfolio Summary

12
Total Pending OAs
4
Non-Final OAs
7
Final Rejections
1
Advisory / Quayle

Response Deadline Pressure

Based on the USPTO statutory response window for each pending office action. 2 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.

1
Overdue
0
Due this week
1
Due this month
0
Due in next 60 days
0
Due later

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

4
Hard (33%)
6
Medium (50%)
2
Easy (17%)
0
Unknown (0%)

Rejection Statute Mix

BucketCases
§103 only6 (50%)
§112 only2 (17%)
Multi-statute (no §101)4 (33%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

0
Life Sciences
0% of docket
0
Information Tech
0% of docket
0
Communications
0% of docket
11
Semiconductors
92% of docket
0
Mechanical / Eng
0% of docket
1
Business / Other
8% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

120 h
Manual time on pending OAs
24 h
Time saved (low, 20%)
42 h
Time saved (mid, 35%)
1.1 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
NELSON, JACOB THEODORE 1 87.7% +7.9%
SMITH, SAMUEL JONATHAN 1 84.3% +4.6%
TURNER, BRIAN 1 83.4% +4.1%
VALENZUELA, PATRICIA D 1 90.3% +2.0%
TRAN, DZUNG 1 83.7% +5.6%
ANDERSON, WILLIAM H 1 84.9% +18.4%
BOULGHASSOUL, YOUNES 1 88.3% +6.9%
ZARNEKE, DAVID A 1 71.1% +11.1%
BEARDSLEY, JONAS TYLER 1 61.0% +28.7%
JUNGE, BRYAN R. 1 58.0% +9.0%

Quick Wins (4)

Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 4 ordered by deadline are shown.

App #TitleExaminerDue in
18888145 METHOD OF FABRICATING HIGH ELECTRON MOBILITY TRANSISTOR NELSON, JACOB THEODORE —
18679834 SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME SMITH, SAMUEL JONATHAN —
18597567 SEMICONDUCTOR DEVICE AND METHODS FOR FORMING THE SAME VALENZUELA, PATRICIA D —
18421956 HIGH-VOLTAGE SEMICONDUCTOR DEVICE TRAN, DZUNG —

Hard Cases (4)

Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 4 ordered by deadline are shown.

App #TitleExaminerDue in
18651253 SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME TURNER, BRIAN —
18415613 MICRO-ELECTRO-MECHANICAL SYSTEM PACKAGE AND FABRICATION METHOD THEREOF ANDERSON, WILLIAM H —
18535659 SEMICONDUCTOR DEVICE BOULGHASSOUL, YOUNES —
18215819 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF BEARDSLEY, JONAS TYLER —

Interview Candidates (3)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 3 ordered by deadline are shown.

App #TitleExaminerDue in
18415613 MICRO-ELECTRO-MECHANICAL SYSTEM PACKAGE AND FABRICATION METHOD THEREOF ANDERSON, WILLIAM H —
18504160 MICRO-ELECTRO-MECHANICAL SYSTEM PACKAGE AND FABRICATION METHOD THEREOF ZARNEKE, DAVID A —
18215819 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF BEARDSLEY, JONAS TYLER —

Top Art Units

Art UnitApps
2817 2
2815 1
2812 1
2893 1
2814 1
2891 1
2811 1
2897 1
2818 1
2813 1

Pending Office Actions

App #TitleExaminerArt UnitStatutesStatusDue inAIFiled
18888145 METHOD OF FABRICATING HIGH ELECTRON MOBILITY TRANSISTOR NELSON, JACOB THEODORE 2815 §103 Non-Final OA — Pending Sep 17, 2024
18679834 SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME SMITH, SAMUEL JONATHAN 2817 §103 Non-Final OA — Pending May 31, 2024
18651253 SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME TURNER, BRIAN — §102§103 Final Rejection — Pending Apr 30, 2024
18597567 SEMICONDUCTOR DEVICE AND METHODS FOR FORMING THE SAME VALENZUELA, PATRICIA D 2812 §103 Final Rejection — Pending Mar 06, 2024
18421956 HIGH-VOLTAGE SEMICONDUCTOR DEVICE TRAN, DZUNG 2893 §103 Final Rejection — Pending Jan 24, 2024
18415613 MICRO-ELECTRO-MECHANICAL SYSTEM PACKAGE AND FABRICATION METHOD THEREOF ANDERSON, WILLIAM H 2817 §102§103 Non-Final OA — Pending Jan 17, 2024
18535659 SEMICONDUCTOR DEVICE BOULGHASSOUL, YOUNES 2814 §102§103 Final Rejection — Pending Dec 11, 2023
18504160 MICRO-ELECTRO-MECHANICAL SYSTEM PACKAGE AND FABRICATION METHOD THEREOF ZARNEKE, DAVID A 2891 §103 Final Rejection — Pending Nov 08, 2023
18215819 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF BEARDSLEY, JONAS TYLER 2811 §102§103 Non-Final OA — Pending Jun 28, 2023
18168321 OPTICAL SENSOR DEVICE JUNGE, BRYAN R. 2897 §103 Final Rejection 18d overdue Pending Feb 13, 2023
18150106 SEMICONDUCTOR DEVICE AND METHODS FOR FORMING THE SAME RAHMAN, KHATIB A 2818 §112 Final Rejection — Pending Jan 04, 2023
18059265 SEMICONDUCTOR DEVICE AND METHODS FOR FORMING THE SAME NICELY, JOSEPH C 2813 §112 Non-Final OA 14d Pending Nov 28, 2022

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Frequently Asked Questions

How many pending USPTO office actions does Vanguard International Semiconductor Corporation have?

Vanguard International Semiconductor Corporation has 12 pending office actions as of October 2026, spread across 10 art units and 12 examiners.

Which USPTO examiner handles the most Vanguard International Semiconductor Corporation applications?

Jacob Theodore Nelson has the most, with 1 of Vanguard International Semiconductor Corporation's pending office actions.

What technology area are Vanguard International Semiconductor Corporation's patent applications in?

Mostly Semiconductors, Circuits & Optics (USPTO Tech Center 2800), based on where its pending office actions are examined.

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