Prosecution Insights
Last updated: May 29, 2026

Foley & Lardner LLP - Tokyo Electron

11 pending office actions • 1 client • 11 examiners • 8 art units • 0 of 11 (0%) have an AI response strategy ready • 34 patents granted in the last 365 days

Portfolio Summary

11
Total Pending OAs
9
Non-Final OAs
2
Final Rejections
0
Advisory / Quayle

Response Deadline Pressure

Based on the USPTO statutory response window for each pending office action. 11 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.

6
Overdue
0
Due this week
2
Due this month
3
Due in next 60 days
0
Due later

Deadline Fire Line

Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 11 of the docket's apps have a known mailing date.

-30dToday30d60d90d120d
Overdue (6)Due ≤ 30 days (2)Due ≤ 60 days (3)

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

0
Hard (0%)
9
Medium (82%)
1
Easy (9%)
1
Unknown (9%)

Rejection Statute Mix

BucketCases
§103 only8 (73%)
§102 only1 (9%)
§112 only1 (9%)
No statute on record1 (9%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

2
Life Sciences
18% of docket
0
Information Tech
0% of docket
0
Communications
0% of docket
9
Semiconductors
82% of docket
0
Mechanical / Eng
0% of docket
0
Business / Other
0% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

110 h
Manual time on pending OAs
22 h
Time saved (low, 20%)
38 h
Time saved (mid, 35%)
1.0 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
PHAM, THOMAS T 1 51.7% +16.3%
AHMED, SHAMIM 1 78.5% +22.0%
ABEL, GARY ROBERT 1 86.7% +11.0%
INOUSSA, MOULOUCOULAY 1 85.8% +7.3%
SLUTSKER, JULIA 1 77.0% +12.6%
GARCES, NELSON Y 1 80.2% +2.7%
BERRY, PAUL ANTHONY 1 93.9% +0.4%
ASHBAHIAN, ERIC K 1 66.9% +6.1%
KIM, SU C 1 77.4% -12.1%
BAIG, ANEESA RIAZ 1 94.1% +7.4%

Quick Wins (5)

Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 5 ordered by deadline are shown.

App #TitleExaminerDue in
17893736 METHOD OF MAKING A PLURALITY OF 3D SEMICONDUCTOR DEVICES WITH ENHANCED MOBILITY AND CONDUCTIVITY BAIG, ANEESA RIAZ 145d overdue
18376359 MULTI-MATERIAL CHUCK ABEL, GARY ROBERT 43d overdue
18313177 SURFACE ENERGY MODIFICATION IN HYBRID BONDING BERRY, PAUL ANTHONY 39d
18367315 METHOD OF SURFACE MODIFICATION FOR WAFER BONDING INOUSSA, MOULOUCOULAY 41d
18204081 NON-PLANAR TRANSISTOR STRUCTURES AND METHODS OF MANUFACTURING THEREOF GARCES, NELSON Y 48d

Interview Candidates (4)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 4 ordered by deadline are shown.

App #TitleExaminerDue in
18224940 FORKSHEET SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME SLUTSKER, JULIA 52d overdue
18376359 MULTI-MATERIAL CHUCK ABEL, GARY ROBERT 43d overdue
18424262 SELECTIVE ETCHING IN SEMICONDUCTOR DEVICES AHMED, SHAMIM 1d overdue
18433320 DIRECT CURRENT SUPERPOSITION (DCS) FOR PROTECTION OF ORGANIC MANDREL DURING SPACER DEPOSITION PHAM, THOMAS T 27d

Client Portfolio (1 client)

Client (Assignee)Pending OAs
Tokyo Electron 11

Top Art Units

Art UnitApps
17132
28912
28142
28971
28181
28981
28991
28931

Pending Office Actions

App #TitleClientExaminerArt UnitStatutesStatusDue inAIFiled
18433320 DIRECT CURRENT SUPERPOSITION (DCS) FOR PROTECTION OF ORGANIC MANDREL DURING SPACER DEPOSITION Tokyo Electron Limited PHAM, THOMAS T 1713 §103 Non-Final OA 27d Pending Feb 05, 2024
18424262 SELECTIVE ETCHING IN SEMICONDUCTOR DEVICES Tokyo Electron Limited AHMED, SHAMIM 1713 §103 Non-Final OA 1d overdue Pending Jan 26, 2024
18376359 MULTI-MATERIAL CHUCK Tokyo Electron Limited ABEL, GARY ROBERT 2897 §103 Non-Final OA 43d overdue Pending Oct 03, 2023
18367315 METHOD OF SURFACE MODIFICATION FOR WAFER BONDING Tokyo Electron Limited INOUSSA, MOULOUCOULAY 2818 §102 Non-Final OA 41d Pending Sep 12, 2023
18224940 FORKSHEET SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME Tokyo Electron Limited SLUTSKER, JULIA 2891 §103 Non-Final OA 52d overdue Pending Jul 21, 2023
18204081 NON-PLANAR TRANSISTOR STRUCTURES AND METHODS OF MANUFACTURING THEREOF Tokyo Electron Limited GARCES, NELSON Y 2814 §103 Non-Final OA 48d Pending May 31, 2023
18313177 SURFACE ENERGY MODIFICATION IN HYBRID BONDING Tokyo Electron Limited BERRY, PAUL ANTHONY 2898 §103 Non-Final OA 39d Pending May 05, 2023
17901783 METHODS OF COMPACT CELL DESIGN FOR LOGIC APPLICATIONS Tokyo Electron Limited ASHBAHIAN, ERIC K 2891 Other Non-Final OA 84d overdue Pending Sep 01, 2022
17898104 METHODS FOR FORMING SEMICONDUCTOR DEVICES WITH ISOLATION STRUCTURES Tokyo Electron Limited KIM, SU C 2899 §103 Non-Final OA 22d Pending Aug 29, 2022
17893736 METHOD OF MAKING A PLURALITY OF 3D SEMICONDUCTOR DEVICES WITH ENHANCED MOBILITY AND CONDUCTIVITY Tokyo Electron Limited BAIG, ANEESA RIAZ 2814 §112 Final Rejection 145d overdue Pending Aug 23, 2022
17667378 ADVANCED 3D DEVICE ARCHITECTURE USING NANOSHEETS WITH 2D MATERIALS FOR SPEED ENHANCEMENT Tokyo Electron Limited PURVIS, SUE A 2893 §103 Final Rejection 96d overdue Pending Feb 08, 2022

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