30 pending office actions • 3 clients
| Client (Assignee) | Pending OAs |
|---|---|
| Xilinx, Inc. | 20 |
| Xilinx, Inc. | 7 |
| Advanced Micro Devices, Inc. | 3 |
| App # | Title | Client | Examiner | Art Unit | Status | Filed |
|---|---|---|---|---|---|---|
| 18815686 | Untitled | Advanced Micro Devices, Inc. | RATHOD, ABHISHEK M | 2841 | Non-Final OA | |
| 18807703 | IIC WITH ADAPTIVE CHIP-TO-CHIP INTERFACE TO SUPPORT DIFFERENT CHIP-TO-CHIP PROTOCOLS | Xilinx, Inc. | PHAN, RAYMOND NGAN | 2175 | Non-Final OA | Aug 16, 2024 |
| 18784476 | SYSTEMS AND METHODS FOR TRACKER FREE RDMA CONGESTION WINDOW SUPPORT | Xilinx, Inc. | SHELEHEDA, JAMES R | 2424 | Final Rejection | Jul 25, 2024 |
| 18781944 | REVOCABLE CRYPTOGRAPHIC KEYS | Xilinx, Inc. | NOAMAN, BASSAM A | 2497 | Non-Final OA | Jul 23, 2024 |
| 18612958 | PULSE GENERATION CIRCUITRY | Xilinx, Inc. | NOWLIN, ERIC | 2474 | Non-Final OA | Mar 21, 2024 |
| 18608175 | DETERMINISTIC BUILT-IN SELF-TEST | Xilinx, Inc. | MERANT, GUERRIER | 2111 | Final Rejection | Mar 18, 2024 |
| 18608183 | METHODOLOGY TO ACHIEVE TRANSACTION REDUNDANCY IN MEMORY CONSTRAINED DEVICES | Xilinx, Inc. | BEGUM, SULTANA | 2824 | Non-Final OA | Mar 18, 2024 |
| 18394797 | CONTROLLER FOR AN ARRAY OF DATA PROCESSING ENGINES | Advanced Micro Devices, Inc. | MILLER, DANIEL E | 2194 | Non-Final OA | Dec 22, 2023 |
| 18394675 | POWER DOMAINS IN A SYSTEM ON A CHIP | Advanced Micro Devices, Inc. | ZAMAN, FAISAL M | 2175 | Final Rejection | Dec 22, 2023 |
| 18394668 | AN AREA AND POWER EFFICIENT CLOCK DATA RECOVERY (CDR) AND ADAPTATION IMPLEMENTATION FOR DENSE WAVELENGTH-DIVISION MULTIPLEXING (DWDM) OPTICAL LINKS | Xilinx, Inc. | BAIG, ADNAN | 2461 | Non-Final OA | Dec 22, 2023 |
| 18526364 | SUBSTRATE NOISE ISOLATION STRUCTURES FOR ELECTRONIC DEVICES | Xilinx, Inc. | MILLER, ALEXANDER MICHAEL | 2898 | Non-Final OA | Dec 01, 2023 |
| 18242246 | RANDOMIZATION OF INSTRUCTION EXECUTION FLOW FOR GLITCH PROTECTION | Xilinx, Inc. | CHEN, ZHI | 2196 | Non-Final OA | Sep 05, 2023 |
| 18215685 | HIGH-BANDWIDTH THREE-DIMENSIONAL (3D) DIE STACK | Xilinx, Inc. | BRASFIELD, QUINTON A | 2814 | Non-Final OA | Jun 28, 2023 |
| 18213647 | 8-T SRAM BITCELL FOR FPGA PROGRAMMING | Xilinx, Inc. | TRAN, ANTHAN | 2825 | Non-Final OA | Jun 23, 2023 |
| 18211465 | SYNTHESIS OF SIMULATION-DIRECTED STATEMENTS | Xilinx, Inc. | KIK, PHALLAKA | 2851 | Non-Final OA | Jun 19, 2023 |
| 18204658 | SELF-AUTHENTICATION OF DATA STORED OFF-CHIP | Xilinx, Inc. | LANIER, BENJAMIN E | 2437 | Final Rejection | Jun 01, 2023 |
| 18204251 | SMART INTERRUPT CONTROLLER | Xilinx, Inc. | KESSLER, GREGORY AARON | 2197 | Non-Final OA | May 31, 2023 |
| 18203607 | ON-CHIP (IN-SYSTEM) TRIGGERING OF LOGIC ANALYZER | Xilinx, Inc. | GUSTAFSON, MATHEW DONALD | 2113 | Final Rejection | May 30, 2023 |
| 18202465 | GLOBAL PLACEMENT OF CIRCUIT DESIGNS USING A CALIBRATED SIMPLE TIMER | Xilinx, Inc. | PARIHAR, SUCHIN | 2851 | Non-Final OA | May 26, 2023 |
| 18143846 | RING MODULATORS WITH LOW-LOSS AND LARGE FREE SPECTRAL RANGE (FSR) ON A SILICON-ON-INSULATOR (SOI) PLATFORM | Xilinx, Inc. | BEDTELYON, JOHN M | 2874 | Non-Final OA | May 05, 2023 |
| 18134497 | ALIGNING MULTI-CHIP DEVICES | Xilinx, Inc. | GARBOWSKI, LEIGH M | 2851 | Non-Final OA | Apr 13, 2023 |
| 18128368 | TWO BY TWO LOGIC CHIPLET | Xilinx, Inc. | GARBOWSKI, LEIGH M | 2851 | Non-Final OA | Mar 30, 2023 |
| 18123160 | PROGRAMMABLE LOGIC FABRIC AS DIE TO DIE INTERCONNECT | Xilinx, Inc. | KIM, SEOKJIN | 2844 | Final Rejection | Mar 17, 2023 |
| 18090207 | ERROR AND DEBUG INFORMATION CAPTURING FOR A BOOT PROCESS | Xilinx, Inc. | TRUONG, LOAN | 2114 | Final Rejection | Dec 28, 2022 |
| 17894873 | FRACTIONAL LOGARITHMIC NUMBER SYSTEM ADDER | Xilinx, Inc. | BUI, KENNY KIM | 2182 | Non-Final OA | Aug 24, 2022 |
| 17867625 | ADAPTIVE MATRIX MULTIPLIERS | Xilinx, Inc. | SANDIFER, MATTHEW D | 2151 | Non-Final OA | Jul 18, 2022 |
| 17862061 | WAVEFORM STIMULUS GENERATION | Xilinx, Inc. | LUU, CUONG V | 2189 | Non-Final OA | Jul 11, 2022 |
| 17571292 | NETWORK INTERFACE DEVICE | Xilinx, Inc. | BARTELS, CHRISTOPHER A. | 2184 | Final Rejection | Jan 07, 2022 |
| 17538497 | METHOD AND SYSTEM FOR INTERFACING A TESTBENCH TO CIRCUIT SIMULATION | Xilinx, Inc. | COCCHI, MICHAEL EDWARD | 2188 | Non-Final OA | Nov 30, 2021 |
| 17454935 | COMPILATION OF NEURAL NETWORKS INTO SUBGRAPHS FOR PROCESSING BY MULTIPLE COMPUTE CIRCUITS | Xilinx, Inc. | RUTTEN, JAMES D | 2121 | Final Rejection | Nov 15, 2021 |
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