Prosecution Insights
Last updated: May 29, 2026

Arcane Law Pllc

23 pending office actions • 2 clients • 20 examiners • 12 art units • 21 of 23 (91%) have an AI response strategy ready • 51 patents granted in the last 365 days

Portfolio Summary

23
Total Pending OAs
15
Non-Final OAs
7
Final Rejections
1
Advisory / Quayle

Response Deadline Pressure

Based on the USPTO statutory response window for each pending office action. 23 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.

9
Overdue
3
Due this week
7
Due this month
3
Due in next 60 days
1
Due later

Deadline Fire Line

Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 23 of the docket's apps have a known mailing date.

-30dToday30d60d90d120d
Overdue (9)Due ≤ 7 days (3)Due ≤ 30 days (7)Due ≤ 60 days (3)Due later (1)

Case Difficulty Mix

Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.

10
Hard (43%)
11
Medium (48%)
1
Easy (4%)
1
Unknown (4%)

Rejection Statute Mix

BucketCases
§103 only7 (30%)
§102 only2 (9%)
§112 only1 (4%)
Double-patenting + other2 (9%)
Multi-statute (no §101)10 (43%)
No statute on record1 (4%)

Industry Mix

How the docket's pending cases split across USPTO tech-center bands.

1
Life Sciences
4% of docket
0
Information Tech
0% of docket
0
Communications
0% of docket
21
Semiconductors
91% of docket
1
Mechanical / Eng
4% of docket
0
Business / Other
0% of docket

Time-on-OA Estimate

Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.

230 h
Manual time on pending OAs
46 h
Time saved (low, 20%)
80 h
Time saved (mid, 35%)
2.0 wks
FTE-weeks freed (mid)

Top Examiners on this docket

ExaminerApps on this docketAllow rateInterview lift
ENAD, CHRISTINE A 3 84.2% +10.2%
NGUYEN, DAO H 2 91.3% +5.6%
BAND, MICHAEL A 1 44.8% +55.4%
CARLSON, MARC 1 70.7% +23.7%
OH, JAEHWAN 1 84.8% +10.3%
LIU, BENJAMIN T 1 74.4% +12.8%
JOHNSON, CHRISTOPHER A 1 83.9% +8.4%
MEMULA, SURESH 1 87.5% -0.4%
TRICE III, WILLIAM CLARENCE 1 80.0% +32.0%
LEE, ALVIN LYNGHI 1 89.0% +8.7%

Quick Wins (5)

Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 5 ordered by deadline are shown.

App #TitleExaminerDue in
18087318 ELONGATED CONTACT FOR SOURCE OR DRAIN REGION OH, JAEHWAN 2d overdue
17951532 MULTI-STAGE MASK ETCH PROCESS ENAD, CHRISTINE A 6d
18080858 MULTI-HEIGHT CELL LIBRARY DESIGN SOLUTION FOR INTEGRATED CIRCUITS MEMULA, SURESH 15d
18083064 DIELECTRIC LAYER STACK FOR WIDE GATE CUT STRUCTURES JOHNSON, CHRISTOPHER A 22d
17957106 ETCH STOP LAYER FOR METAL GATE CUT ENAD, CHRISTINE A 34d

Hard Cases (10)

Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 8 ordered by deadline are shown.

App #TitleExaminerDue in
17936952 FORKSHEET TRANSISTOR STRUCTURES WITH GATE CUT SPINE ENAD, CHRISTINE A 120d overdue
18399237 SPUTTER TARGETS FOR SELF-DOPED SOURCE AND DRAIN CONTACTS BAND, MICHAEL A 105d overdue
17940195 BARRIER LAYER FOR DIELECTRIC RECESS MITIGATION GARCES, NELSON Y 5d overdue
17957821 GATE CUT, WITH ASYMMETRICAL CHANNEL TO GATE CUT SPACING NGUYEN, DAO H 4d overdue
18077394 INTEGRATION OF FINFET AND GATE-ALL-AROUND DEVICES TRICE III, WILLIAM CLARENCE 3d overdue
18084844 DIELECTRIC BARRIER FOR BACKSIDE INTERCONNECT SEPARATION LIU, BENJAMIN T 1d overdue
17742638 DOPING CONTACTS OF THIN FILM TRANSISTORS BEARDSLEY, JONAS TYLER 6d
17943819 WIDE CHANNEL DIODE STRUCTURE INCLUDING SUB-FIN LEE, ALVIN LYNGHI 12d

Interview Candidates (8)

Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 8 ordered by deadline are shown.

App #TitleExaminerDue in
17936952 FORKSHEET TRANSISTOR STRUCTURES WITH GATE CUT SPINE ENAD, CHRISTINE A 120d overdue
18399237 SPUTTER TARGETS FOR SELF-DOPED SOURCE AND DRAIN CONTACTS BAND, MICHAEL A 105d overdue
18485617 VACUUM CLEANER WITH HAND NOZZLE CARLSON, MARC 30d overdue
18077394 INTEGRATION OF FINFET AND GATE-ALL-AROUND DEVICES TRICE III, WILLIAM CLARENCE 3d overdue
18087318 ELONGATED CONTACT FOR SOURCE OR DRAIN REGION OH, JAEHWAN 2d overdue
18084844 DIELECTRIC BARRIER FOR BACKSIDE INTERCONNECT SEPARATION LIU, BENJAMIN T 1d overdue
17951532 MULTI-STAGE MASK ETCH PROCESS ENAD, CHRISTINE A 6d
17957106 ETCH STOP LAYER FOR METAL GATE CUT ENAD, CHRISTINE A 34d

Client Portfolio (2 clients)

Client (Assignee)Pending OAs
Intel 22
Origyn LLC 1

Top Art Units

Art UnitApps
28114
28134
28183
28992
28932
28142
17941
37231
28511
28981

Pending Office Actions

App #TitleClientExaminerArt UnitStatutesStatusDue inAIFiled
18399237 SPUTTER TARGETS FOR SELF-DOPED SOURCE AND DRAIN CONTACTS Intel Corporation BAND, MICHAEL A 1794 §102§103 Final Rejection 105d overdue AI Ready Dec 28, 2023
18485617 VACUUM CLEANER WITH HAND NOZZLE Origyn LLC CARLSON, MARC 3723 §103 Non-Final OA 30d overdue Pending Oct 12, 2023
18125430 SEMICONDUCTOR DEVICES BETWEEN GATE CUTS AND DEEP BACKSIDE VIAS Intel Corporation NGUYEN, DAO H 2818 §102§103 Non-Final OA 60d Pending Mar 23, 2023
18087318 ELONGATED CONTACT FOR SOURCE OR DRAIN REGION Intel Corporation OH, JAEHWAN 2899 §102 Non-Final OA 2d overdue AI Ready Dec 22, 2022
18084844 DIELECTRIC BARRIER FOR BACKSIDE INTERCONNECT SEPARATION Intel Corporation LIU, BENJAMIN T 2893 §102§103§112 Non-Final OA 1d overdue AI Ready Dec 20, 2022
18083064 DIELECTRIC LAYER STACK FOR WIDE GATE CUT STRUCTURES Intel Corporation JOHNSON, CHRISTOPHER A 2899 §103 Non-Final OA 22d AI Ready Dec 16, 2022
18080858 MULTI-HEIGHT CELL LIBRARY DESIGN SOLUTION FOR INTEGRATED CIRCUITS Intel Corporation MEMULA, SURESH 2851 §103 Non-Final OA 15d AI Ready Dec 14, 2022
18077394 INTEGRATION OF FINFET AND GATE-ALL-AROUND DEVICES Intel Corporation TRICE III, WILLIAM CLARENCE 2893 §102§103 Non-Final OA 3d overdue AI Ready Dec 08, 2022
17957821 GATE CUT, WITH ASYMMETRICAL CHANNEL TO GATE CUT SPACING Intel Corporation NGUYEN, DAO H 2818 §102§103 Non-Final OA 4d overdue AI Ready Sep 30, 2022
17957106 ETCH STOP LAYER FOR METAL GATE CUT Intel Corporation ENAD, CHRISTINE A 2811 §103 Final Rejection 34d AI Ready Sep 30, 2022
17936952 FORKSHEET TRANSISTOR STRUCTURES WITH GATE CUT SPINE Intel Corporation ENAD, CHRISTINE A 2811 §102§103 Non-Final OA 120d overdue AI Ready Sep 30, 2022
17951532 MULTI-STAGE MASK ETCH PROCESS Intel Corporation ENAD, CHRISTINE A 2811 §103 Non-Final OA 6d AI Ready Sep 23, 2022
17943819 WIDE CHANNEL DIODE STRUCTURE INCLUDING SUB-FIN Intel Corporation LEE, ALVIN LYNGHI 2813 §102§103§112 Non-Final OA 12d AI Ready Sep 13, 2022
17943840 TRANSISTOR DEVICES WITH INTEGRATED DIODES Intel Corporation WEILAND, ADAM DAVID 2813 §102§103§112 Non-Final OA 12d AI Ready Sep 13, 2022
17943812 DIODES WITH BACKSIDE CONTACT Intel Corporation AHMED, SHAHED 2813 §102 Non-Final OA 8d AI Ready Sep 13, 2022
17940195 BARRIER LAYER FOR DIELECTRIC RECESS MITIGATION Intel Corporation GARCES, NELSON Y 2814 §102§103 Final Rejection 5d overdue AI Ready Sep 08, 2022
17838637 DUAL METAL SILICIDE FOR STACKED TRANSISTOR DEVICES Intel Corporation MENZ, LAURA MARY 2813 Final Rejection 90d AI Ready Jun 13, 2022
17831800 REMOVAL OF UPPER CHANNEL BODIES IN STACKED GATE-ALL-AROUND (GAA) DEVICE STRUCTURES Intel Corporation VERDES, RICKY 2898 DPOther Non-Final OA 13d AI Ready Jun 03, 2022
17742638 DOPING CONTACTS OF THIN FILM TRANSISTORS Intel Corporation BEARDSLEY, JONAS TYLER 2811 §102§103 Non-Final OA 6d AI Ready May 12, 2022
17556737 NON-REACTIVE EPI CONTACT FOR STACKED TRANSISTORS Intel Corporation RAMIREZ, ALEXANDRE XAVIER 2812 §103DP Final Rejection 117d overdue AI Ready Dec 20, 2021
17550861 STACKED TRANSISTORS WITH REMOVED EPI BARRIER Intel Corporation XU, ZHIJUN 2818 §103 Non-Final OA 7d AI Ready Dec 14, 2021
17547980 WRAP-AROUND CONTACT WITH REDUCED RESISTANCE Intel Corporation PIZARRO CRESPO, MARCOS D 2814 §112 Final Rejection 34d AI Ready Dec 10, 2021
17406480 SELF-ALIGNED GATE CUT STRUCTURES Intel Corporation WEGNER, AARON MICHAEL 2897 §103 Final Rejection 28d AI Ready Aug 19, 2021

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