76 pending office actions • 1 client • 66 examiners • 42 art units • 68 of 76 (89%) have an AI response strategy ready • 166 patents granted in the last 365 days
Based on the USPTO statutory response window for each pending office action. 76 of the docket's apps have a known mailing date; the rest are excluded from the tile counts.
Every pending office action with a known statutory deadline, placed on a days-until-due axis. Dots left of Today are overdue; the further right, the more runway. Cases that share a deadline window stack vertically. 76 of the docket's apps have a known mailing date.
Difficulty is derived from the rejection statutes on the most recent pending office action. §101-driven and multi-statute cases are graded Hard; §112-only and obviousness-type double-patenting cases are graded Easy; everything else is Medium. "Unknown" means we have not yet parsed a statute for that office action.
| Bucket | Cases |
|---|---|
| §101 + other | 14 (18%) |
| §103 only | 24 (32%) |
| §102 only | 6 (8%) |
| Double-patenting + other | 5 (7%) |
| Multi-statute (no §101) | 26 (34%) |
| No statute on record | 1 (1%) |
How the docket's pending cases split across USPTO tech-center bands.
Manual office-action response work runs about 10 hours per case. The time-saved bands below show what IP Author's prosecution pipeline typically delivers — a conservative 20% on the low end, 35% in the middle, 50% on the high end.
| Examiner | Apps on this docket | Allow rate | Interview lift |
|---|---|---|---|
| BULLARD-CONNOR, GENEVIEVE GRACE | 4 | 50.0% | +0.0% |
| VARNDELL, ROSS E | 2 | 84.5% | +13.2% |
| PARTHASARATHY, ROHIT | 2 | 90.6% | +12.5% |
| MCCOY, THOMAS WILSON | 2 | 92.9% | +12.5% |
| ARMAND, MARC ANTHONY | 2 | 83.3% | +3.9% |
| TRAN, THANH Y | 2 | 86.1% | +9.0% |
| YAP, DOUGLAS ANTHONY | 2 | 87.5% | +15.4% |
| VILLANUEVA, MARKUS ANTHONY | 2 | 52.3% | +39.4% |
| PHILIPPE, GIMS S | 1 | 85.5% | +1.4% |
| LOTFI, KYLE M | 1 | 63.8% | +7.2% |
Cases in front of an examiner with an allow rate of 80%+ where the difficulty is Easy or Medium. The top 7 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 17517152 | NO-REMELT SOLDER ENFORCEMENT JOINT | MCCOY, THOMAS WILSON | 147d overdue |
| 17557134 | TRANSFORMERS BASED ON BURIED POWER RAIL TECHNOLOGY | YAP, DOUGLAS ANTHONY | 126d overdue |
| 17707157 | GLASS BRIDGE FOR CONNECTING DIES | YAP, DOUGLAS ANTHONY | 111d overdue |
| 17957003 | HIGH SURFACE AREA CAPACITOR IN AN ELECTRONIC SUBSTRATE PACKAGE | PARTHASARATHY, ROHIT | 9d |
| 17842093 | CHIP-FIRST LAYERED PACKAGING ARCHITECTURE | TRAN, THANH Y | 19d |
| 17846086 | PACKAGE ARCHITECTURE WITH VERTICAL STACKING OF INTEGRATED CIRCUIT DIES HAVING PLANARIZED EDGES | TRAN, THANH Y | 30d |
| 18991939 | DETERMINING ADAPTIVE QUANTIZATION MATRICES USING MACHINE LEARNING FOR VIDEO CODING | PHILIPPE, GIMS S | 62d |
Multi-statute / §101-driven matters, or cases in front of an examiner with an allow rate under 30%. The top 8 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 17698322 | MICROELECTRONIC ASSEMBLIES INCLUDING STIFFENERS | SEHAR, FAKEHA | 188d overdue |
| 17552845 | PACKAGING ARCHITECTURE WITH INTEGRATED CIRCUIT DIES OVER INPUT/OUTPUT INTERFACES | STEPHENSON, KENNETH STEPHEN | 140d overdue |
| 17978290 | METHOD AND SYSTEM OF VIDEO CODING WITH INLINE DOWNSCALING HARDWARE | HANSELL JR., RICHARD A | 45d overdue |
| 17477323 | GLASS CORE WITH CAVITY STRUCTURE FOR HETEROGENEOUS PACKAGING ARCHITECTURE | BRASFIELD, QUINTON A | 38d overdue |
| 17705878 | PACKAGE LAYERS FOR STRESS MONITORING AND METHOD | BULLARD-CONNOR, GENEVIEVE GRACE | 31d overdue |
| 18624198 | CO-PACKAGING WITH SILICON PHOTONICS HYBRID PLANAR LIGHTWAVE CIRCUIT | STAHL, MICHAEL J | 30d overdue |
| 17544598 | SYSTEM AND METHOD FOR PRUNING FILTERS IN DEEP NEURAL NETWORKS | MARU, MATIYAS T | 25d overdue |
| 17546461 | METAL CARBON BARRIER REGION FOR NMOS DEVICE CONTACTS | MILLER, ALEXANDER MICHAEL | 24d overdue |
Cases in front of an examiner whose interview lift is 10 percentage points or more — i.e. interviewed cases historically resolve more favorably than non-interviewed ones. The top 8 ordered by deadline are shown.
| App # | Title | Examiner | Due in |
|---|---|---|---|
| 17517152 | NO-REMELT SOLDER ENFORCEMENT JOINT | MCCOY, THOMAS WILSON | 147d overdue |
| 17643652 | PEAK SELF-NORMALIZATION GAIN CONTROL BASED ON HOPF RESONATORS CASCADE SIGNAL SPECTRAL DECOMPOSITION | VILLANUEVA, MARKUS ANTHONY | 140d overdue |
| 17557134 | TRANSFORMERS BASED ON BURIED POWER RAIL TECHNOLOGY | YAP, DOUGLAS ANTHONY | 126d overdue |
| 17707157 | GLASS BRIDGE FOR CONNECTING DIES | YAP, DOUGLAS ANTHONY | 111d overdue |
| 17957003 | HIGH SURFACE AREA CAPACITOR IN AN ELECTRONIC SUBSTRATE PACKAGE | PARTHASARATHY, ROHIT | 9d |
| 17935627 | INTEGRATED CIRCUIT DEVICES WITH ANGLED INTERCONNECTS | MCCOY, THOMAS WILSON | 13d |
| 18527490 | 3D OBJECT RECOGNITION USING 3D CONVOLUTIONAL NEURAL NETWORK WITH DEPTH BASED MULTI-SCALE FILTERS | VARNDELL, ROSS E | 27d |
| 17847434 | PACKAGING ARCHITECTURE WITH COAXIAL PILLARS FOR HIGH-SPEED INTERCONNECTS | PARTHASARATHY, ROHIT | 34d |
| Client (Assignee) | Pending OAs |
|---|---|
| Intel | 76 |
| Art Unit | Apps |
|---|---|
| 2899 | 10 |
| 2898 | 5 |
| 2813 | 4 |
| 2814 | 4 |
| 2817 | 4 |
| 2897 | 3 |
| 2151 | 3 |
| 2893 | 3 |
| 2874 | 2 |
| 2674 | 2 |
| App # | Title | Client | Examiner | Art Unit | Statutes | Status | Due in | AI | Filed |
|---|---|---|---|---|---|---|---|---|---|
| 18991939 | DETERMINING ADAPTIVE QUANTIZATION MATRICES USING MACHINE LEARNING FOR VIDEO CODING | Intel Corporation | PHILIPPE, GIMS S | 2424 | §103 | Non-Final OA | 62d | Pending | Dec 23, 2024 |
| 18921274 | ADAPTIVE QUALITY BOOSTING FOR LOW LATENCY VIDEO CODING | Intel Corporation | LOTFI, KYLE M | 2425 | §103§112DP | Non-Final OA | 29d | AI Ready | Oct 21, 2024 |
| 18896006 | AUDIO SPATIALIZATION | Intel Corporation | ELAHEE, MD S | 2694 | §102DP | Non-Final OA | 84d | Pending | Sep 25, 2024 |
| 18794326 | UNIFIED PROGRAMMING INTERFACE FOR REGRAINED TILE EXECUTION | Intel Corporation | DORAIS, CRAIG C | 2198 | §101§102§112 | Non-Final OA | 84d | Pending | Aug 05, 2024 |
| 18761473 | INTEGRATED CIRCUIT PACKAGES, ANTENNA MODULES, AND COMMUNICATION DEVICES | Intel Corporation | LOTTER, DAVID E | 2845 | §103 | Non-Final OA | 6d | AI Ready | Jul 02, 2024 |
| 18624198 | CO-PACKAGING WITH SILICON PHOTONICS HYBRID PLANAR LIGHTWAVE CIRCUIT | Intel Corporation | STAHL, MICHAEL J | 2874 | §102§103§112 | Non-Final OA | 30d overdue | AI Ready | Apr 02, 2024 |
| 18613293 | OPTICAL TRANSCEIVERS WITH MULTI-LASER MODULES | Intel Corporation | DOBSON, DANIEL G | 2634 | §102§103DP | Non-Final OA | 16d overdue | AI Ready | Mar 22, 2024 |
| 18411542 | IMPORTANCE-AWARE MODEL PRUNING AND RE-TRAINING FOR EFFICIENT CONVOLUTIONAL NEURAL NETWORKS | Intel Corporation | VARNDELL, ROSS E | 2674 | §101§102§103 | Non-Final OA | 40d | AI Ready | Jan 12, 2024 |
| 18396922 | DECOUPLING CAPACITORS BASED ON DUMMY THROUGH-SILICON-VIAS | Intel Corporation | BOWEN, ADAM S | 2897 | §103DP | Non-Final OA | 14d | AI Ready | Dec 27, 2023 |
| 18527490 | 3D OBJECT RECOGNITION USING 3D CONVOLUTIONAL NEURAL NETWORK WITH DEPTH BASED MULTI-SCALE FILTERS | Intel Corporation | VARNDELL, ROSS E | 2674 | §101§103§112DP | Non-Final OA | 27d | AI Ready | Dec 04, 2023 |
| 18491266 | SYSTEMS AND METHODS FOR PROVIDING NON-LEXICAL CUES IN SYNTHESIZED SPEECH | Intel Corporation | MASTERS, KRISTEN MICHELLE | 2659 | §101§103 | Final Rejection | 41d | AI Ready | Oct 20, 2023 |
| 18333758 | INTEGRATED CIRCUIT DEVICE WITH MULTI-LENGTH GATE ELECTRODE | Intel Corporation | KOO, LAMONT B | 2813 | §102§103 | Non-Final OA | 22d | AI Ready | Jun 13, 2023 |
| 18325267 | CAUSAL EXPLANATION OF ATTENTION-BASED NEURAL NETWORK OUTPUT | Intel Corporation | SAX, STEVEN PAUL | 2146 | §101§103 | Non-Final OA | 54d | AI Ready | May 30, 2023 |
| 18325348 | NEURAL NETWORK TRAINING AND INFERENCE WITH HIERARCHICAL ADJACENCY MATRIX | Intel Corporation | HOANG, HAU HAI | 2154 | §101§102§103 | Non-Final OA | 20d | AI Ready | May 30, 2023 |
| 18314862 | LOGIC CIRCUITS USING VERTICAL TRANSISTORS WITH BACKSIDE SOURCE OR DRAIN REGIONS | Intel Corporation | RAMALLO, GUSTAVO G | 2812 | §102§103§112 | Non-Final OA | 9d overdue | AI Ready | May 10, 2023 |
| 18304713 | DETECTING AND MITIGATING FAULT IN SPARSITY COMPUTATION IN DEEP NEURAL NETWORK | Intel Corporation | YI, HYUNGJUN B | 2146 | §101§103 | Non-Final OA | 9d | AI Ready | Apr 21, 2023 |
| 18135958 | ACCELERATING NEURAL NETWORKS WITH LOW PRECISION-BASED MULTIPLICATION AND EXPLOITING SPARSITY IN HIGHER ORDER BITS | Intel Corporation | WERNER, MARSHALL L | 2125 | §101§103§112 | Non-Final OA | 1d overdue | AI Ready | Apr 18, 2023 |
| 18187001 | THREE-DIMENSIONAL POWER COMBINERS | Intel Corporation | RAHMAN, HAFIZUR | 2843 | §102§103 | Non-Final OA | 63d | Pending | Mar 21, 2023 |
| 18176252 | METHODS AND APPARATUS FOR REAL-TIME VOICE TYPE DETECTION IN AUDIO DATA | Intel Corporation | SIDDO, IBRAHIM | 2681 | §102§103 | Non-Final OA | 30d | AI Ready | Feb 28, 2023 |
| 18148358 | END-TO-END NEUROMORPHIC ACOUSTIC PROCESSING | Intel Corporation | BECKER, TYLER JUSTIN | 2657 | §102§103 | Non-Final OA | 6d | AI Ready | Dec 29, 2022 |
| 18089963 | OPTICAL SEMICONDUCTOR PACKAGE AND METHOD | Intel Corporation | JORDAN, ANDREW | 2874 | §102§103 | Non-Final OA | 28d | AI Ready | Dec 28, 2022 |
| 18089417 | INTERCONNECT DEVICE AND METHOD | Intel Corporation | CHOUDHRY, MOHAMMAD M | 2899 | §102§103 | Non-Final OA | 1d overdue | AI Ready | Dec 27, 2022 |
| 18145038 | PRECURSORS AND METHODS FOR PRODUCING BISMUTH-OXY-CARBIDE-BASED PHOTORESIST | Intel Corporation | COSGROVE, JAYSON D | 1737 | §103 | Non-Final OA | 1d overdue | AI Ready | Dec 22, 2022 |
| 18068601 | High Density Transistor and Routing Track Architecture | Intel Corporation | MEMULA, SURESH | 2851 | §102§103 | Non-Final OA | 9d | AI Ready | Dec 20, 2022 |
| 18078051 | EQUALIZING AND TRACKING SPEAKER VOICES IN SPATIAL CONFERENCING | Intel Corporation | KAZEMINEZHAD, FARZAD | 2653 | §101§102§103 | Non-Final OA | 4d overdue | AI Ready | Dec 08, 2022 |
| 18055315 | ACCELERATING DATA LOAD AND COMPUTATION IN FRONTEND CONVOLUTIONAL LAYER | Intel Corporation | SPANN, COURTNEY P | 2183 | §101§103§112 | Non-Final OA | 22d overdue | AI Ready | Nov 14, 2022 |
| 17978290 | METHOD AND SYSTEM OF VIDEO CODING WITH INLINE DOWNSCALING HARDWARE | Intel Corporation | HANSELL JR., RICHARD A | 2486 | §102§103§112 | Non-Final OA | 45d overdue | AI Ready | Nov 01, 2022 |
| 18050929 | CALIBRATING CONFIDENCE OF CLASSIFICATION MODELS | Intel Corporation | BRAHMACHARI, MANDRITA | 2144 | — | Final Rejection | 90d | AI Ready | Oct 28, 2022 |
| 18050944 | DEEP NEURAL NETWORK (DNN) ACCELERATOR FACILITATING ACTIVATION COMPRESSION | Intel Corporation | BOSTWICK, SIDNEY VINCENT | 2124 | §102§103 | Final Rejection | 34d | Pending | Oct 28, 2022 |
| 17972923 | COPPER FILL FOR HEAT MANAGEMENT IN INTEGRATED CIRCUIT DEVICE | Intel Corporation | MCDONALD, JASON ANDREW | 2898 | §102§103 | Non-Final OA | 57d | AI Ready | Oct 25, 2022 |
| 18046635 | PACKAGE ARCHITECTURE WITH GLASS CORE SUBSTRATE HAVING INTEGRATED INDUCTORS | Intel Corporation | LOPEZ, JORGE ANDRES | 2897 | §103 | Non-Final OA | 14d | AI Ready | Oct 14, 2022 |
| 17957003 | HIGH SURFACE AREA CAPACITOR IN AN ELECTRONIC SUBSTRATE PACKAGE | Intel Corporation | PARTHASARATHY, ROHIT | 2899 | §103 | Non-Final OA | 9d | AI Ready | Sep 30, 2022 |
| 17937248 | HIGH DYNAMIC RANGE DIGITIZATION TECHNOLOGY FOR ANALOG COMPUTE-IN-MEMORY AND EDGE AI APPLICATIONS | Intel Corporation | YAARY, MICHAEL D | 2151 | §102 | Non-Final OA | 29d | AI Ready | Sep 30, 2022 |
| 17957637 | POROUS POLYMER DIELECTRIC LAYER ON CORE | Intel Corporation | ARORA, AJAY | 2892 | §103 | Non-Final OA | 5d overdue | AI Ready | Sep 30, 2022 |
| 17953511 | OPEN CAVITY INTERCONNECTS FOR MIB CONNECTIONS | Intel Corporation | CHEN, YU | 2896 | §102§103§112 | Non-Final OA | 4d overdue | AI Ready | Sep 27, 2022 |
| 17935627 | INTEGRATED CIRCUIT DEVICES WITH ANGLED INTERCONNECTS | Intel Corporation | MCCOY, THOMAS WILSON | 2814 | §103§112 | Final Rejection | 13d | AI Ready | Sep 27, 2022 |
| 17948586 | THIN FILM CAPACITORS | Intel Corporation | DIAZ, JOSE R | 2815 | §102 | Non-Final OA | 10d overdue | AI Ready | Sep 20, 2022 |
| 17947642 | SPARSITY PROCESSING ON UNPACKED DATA | Intel Corporation | METZGER, MICHAEL J | 2122 | §103 | Non-Final OA | 77d | Pending | Sep 19, 2022 |
| 17930841 | FULL WAFER DEVICE WITH BACK SIDE INTERCONNECTS AND WAFER-SCALE INTEGRATION | Intel Corporation | ARMAND, MARC ANTHONY | 2813 | §102§103 | Non-Final OA | 22d | AI Ready | Sep 09, 2022 |
| 17929749 | NEURAL NETWORK FACILITATING FIXED-POINT EMULATION OF FLOATING-POINT COMPUTATION | Intel Corporation | BUI, KENNY KIM | 2182 | §101§103§112 | Non-Final OA | 28d | AI Ready | Sep 05, 2022 |
| 17929471 | MICROELECTRONIC ASSEMBLIES HAVING POWER DELIVERY ROUTED THROUGH A BRIDGE DIE | Intel Corporation | HANUMASAGAR, SHAMITA S | 2814 | §103 | Final Rejection | 2d overdue | AI Ready | Sep 02, 2022 |
| 17899670 | FULL WAFER DEVICE WITH MULTIPLE DIRECTIONAL INDICATORS | Intel Corporation | ARMAND, MARC ANTHONY | 2813 | §102§103 | Non-Final OA | 20d | AI Ready | Aug 31, 2022 |
| 17820900 | DEEP NEURAL NETWORK (DNN) ACCELERATORS WITH HETEROGENEOUS TILING | Intel Corporation | STORK, KYLE R | 2128 | §103 | Final Rejection | 14d | AI Ready | Aug 19, 2022 |
| 17821009 | QUASI-MONOLITHIC DIE ARCHITECTURES | Intel Corporation | RODRIGUEZ VILLANU, SANDRA MILENA | 2898 | §103 | Final Rejection | 61d | Pending | Aug 19, 2022 |
| 17820593 | NEURAL NETWORK BASED POWER AND PERFORMANCE MODEL FOR VERSATILE PROCESSING UNITS | Intel Corporation | SPRAUL III, VINCENT ANTON | 2129 | §101§103 | Non-Final OA | 19d overdue | AI Ready | Aug 18, 2022 |
| 17847434 | PACKAGING ARCHITECTURE WITH COAXIAL PILLARS FOR HIGH-SPEED INTERCONNECTS | Intel Corporation | PARTHASARATHY, ROHIT | 2899 | §102§103 | Non-Final OA | 34d | AI Ready | Jun 23, 2022 |
| 17847257 | PACKAGING ARCHITECTURE WITH TRENCH VIA ROUTING FOR ON-PACKAGE HIGH-SPEED INTERCONNECTS | Intel Corporation | ULLAH, ELIAS | 2893 | §102 | Non-Final OA | 37d overdue | AI Ready | Jun 23, 2022 |
| 17846153 | PACKAGE ARCHITECTURE OF THREE-DIMENSIONAL INTERCONNECT CUBE WITH INTEGRATED CIRCUIT DIES HAVING PLANARIZED EDGES | Intel Corporation | VU, HUNG K | 2897 | §102§103 | Non-Final OA | 14d | AI Ready | Jun 22, 2022 |
| 17846086 | PACKAGE ARCHITECTURE WITH VERTICAL STACKING OF INTEGRATED CIRCUIT DIES HAVING PLANARIZED EDGES | Intel Corporation | TRAN, THANH Y | 2817 | DPOther | Non-Final OA | 30d | AI Ready | Jun 22, 2022 |
| 17846129 | PACKAGE ARCHITECTURE WITH VERTICALLY STACKED BRIDGE DIES HAVING PLANARIZED EDGES | Intel Corporation | GREEN, TELLY D | 2898 | §103 | Non-Final OA | 38d overdue | AI Ready | Jun 22, 2022 |
| 17842093 | CHIP-FIRST LAYERED PACKAGING ARCHITECTURE | Intel Corporation | TRAN, THANH Y | 2817 | §102 | Non-Final OA | 19d | AI Ready | Jun 16, 2022 |
| 17825558 | SOCKETED MEMORY ARCHITECTURE PACKAGE AND METHOD | Intel Corporation | CRUM, GAGE STEPHEN | 2841 | §103 | Final Rejection | 25d overdue | AI Ready | May 26, 2022 |
| 17728147 | PACKAGING ARCHITECTURE FOR WAFER-SCALE KNOWN-GOOD-DIE TO KNOWN-GOOD-DIE HYBRID BONDING | Intel Corporation | GOODWIN, DAVID J | 2817 | §103§112 | Final Rejection | 20d | AI Ready | Apr 25, 2022 |
| 17709796 | DYNAMIC COMPENSATION OF ANALOG CIRCUITRY IMPAIRMENTS IN NEURAL NETWORKS | Intel Corporation | LEWIS, MATTHEW LEE | 2144 | §101§102§103 | Non-Final OA | 15d overdue | AI Ready | Mar 31, 2022 |
| 17707157 | GLASS BRIDGE FOR CONNECTING DIES | Intel Corporation | YAP, DOUGLAS ANTHONY | 2899 | §103 | Final Rejection | 111d overdue | AI Ready | Mar 29, 2022 |
| 17705878 | PACKAGE LAYERS FOR STRESS MONITORING AND METHOD | Intel Corporation | BULLARD-CONNOR, GENEVIEVE GRACE | 2899 | §102§103 | Final Rejection | 31d overdue | AI Ready | Mar 28, 2022 |
| 17698322 | MICROELECTRONIC ASSEMBLIES INCLUDING STIFFENERS | Intel Corporation | SEHAR, FAKEHA | 2893 | §102§103 | Non-Final OA | 188d overdue | AI Ready | Mar 18, 2022 |
| 17698365 | MICROELECTRONIC ASSEMBLIES INCLUDING STIFFENERS | Intel Corporation | BULLARD-CONNOR, GENEVIEVE GRACE | 2899 | §102 | Final Rejection | 91d overdue | AI Ready | Mar 18, 2022 |
| 17698430 | MICROELECTRONIC ASSEMBLIES INCLUDING STIFFENERS | Intel Corporation | BULLARD-CONNOR, GENEVIEVE GRACE | 2899 | §103 | Non-Final OA | 4d overdue | AI Ready | Mar 18, 2022 |
| 17690358 | TRANSISTOR ARRANGEMENTS WITH REDUCED DIMENSIONS AT THE GATE | Intel Corporation | AHMED, SHAHED | 2813 | §103 | Final Rejection | 103d overdue | AI Ready | Mar 09, 2022 |
| 17678928 | SHARED CONTACT DEVICES WITH CONTACTS EXTENDING INTO A CHANNEL LAYER | Intel Corporation | CRAMER, HALEE PAIGE | 2891 | §102§103 | Final Rejection | 75d | AI Ready | Feb 23, 2022 |
| 17677909 | VERTICAL TUNNELING FIELD-EFFECT TRANSISTOR | Intel Corporation | BOATMAN, CASEY PAUL | 2893 | §102 | Final Rejection | 114d overdue | AI Ready | Feb 22, 2022 |
| 17557134 | TRANSFORMERS BASED ON BURIED POWER RAIL TECHNOLOGY | Intel Corporation | YAP, DOUGLAS ANTHONY | 2899 | §103 | Final Rejection | 126d overdue | AI Ready | Dec 21, 2021 |
| 17557128 | INTEGRATED CIRCUITS WITH MAX OR MX CONDUCTIVE MATERIALS | Intel Corporation | FAYETTE, NATHALIE RENEE | 2812 | §103 | Final Rejection | 22d | AI Ready | Dec 21, 2021 |
| 17555401 | MICROELECTRONIC ASSEMBLIES WITH SILICON NITRIDE MULTILAYER | Intel Corporation | IQBAL, HAMNA FATHIMA | 2817 | §103 | Non-Final OA | 1d overdue | AI Ready | Dec 18, 2021 |
| 17554004 | INDUCTORS AND TRANSFORMERS FORMED BY BURIED POWER RAILS | Intel Corporation | OH, JIYOUNG | 2818 | §103 | Final Rejection | 2d overdue | AI Ready | Dec 17, 2021 |
| 17552845 | PACKAGING ARCHITECTURE WITH INTEGRATED CIRCUIT DIES OVER INPUT/OUTPUT INTERFACES | Intel Corporation | STEPHENSON, KENNETH STEPHEN | 2898 | §103§112 | Final Rejection | 140d overdue | AI Ready | Dec 16, 2021 |
| 17552581 | MICROELECTRONIC ASSEMBLIES WITH GLASS SUBSTRATES AND THIN FILM CAPACITORS | Intel Corporation | BULLARD-CONNOR, GENEVIEVE GRACE | 2899 | §103 | Non-Final OA | 29d | AI Ready | Dec 16, 2021 |
| 17643652 | PEAK SELF-NORMALIZATION GAIN CONTROL BASED ON HOPF RESONATORS CASCADE SIGNAL SPECTRAL DECOMPOSITION | Intel Corporation | VILLANUEVA, MARKUS ANTHONY | 2151 | §103 | Final Rejection | 140d overdue | AI Ready | Dec 10, 2021 |
| 17546461 | METAL CARBON BARRIER REGION FOR NMOS DEVICE CONTACTS | Intel Corporation | MILLER, ALEXANDER MICHAEL | 2898 | §102§103 | Non-Final OA | 24d overdue | AI Ready | Dec 09, 2021 |
| 17544598 | SYSTEM AND METHOD FOR PRUNING FILTERS IN DEEP NEURAL NETWORKS | Intel Corporation | MARU, MATIYAS T | 2148 | §101§103 | Non-Final OA | 25d overdue | Pending | Dec 07, 2021 |
| 17517152 | NO-REMELT SOLDER ENFORCEMENT JOINT | Intel Corporation | MCCOY, THOMAS WILSON | 2814 | §103 | Final Rejection | 147d overdue | AI Ready | Nov 02, 2021 |
| 17482681 | MICROELECTRONIC ASSEMBLIES INCLUDING BRIDGES | Intel Corporation | TIVARUS, CRISTIAN ALEXANDRU | 2899 | §103§112 | Final Rejection | 7d | AI Ready | Sep 23, 2021 |
| 17477323 | GLASS CORE WITH CAVITY STRUCTURE FOR HETEROGENEOUS PACKAGING ARCHITECTURE | Intel Corporation | BRASFIELD, QUINTON A | 2814 | §102§103 | Final Rejection | 38d overdue | AI Ready | Sep 16, 2021 |
| 17473414 | PATCH PACKAGING ARCHITECTURE IMPLEMENTING HYBRID BONDS AND SELF-ALIGNED TEMPLATE | Intel Corporation | NGUYEN, DUY T V | 2818 | §103 | Final Rejection | 29d | AI Ready | Sep 13, 2021 |
| 17358868 | AREA AND ENERGY EFFICIENT MULTI-PRECISION MULTIPLY-ACCUMULATE UNIT-BASED PROCESSOR | Intel Corporation | VILLANUEVA, MARKUS ANTHONY | 2151 | §103 | Non-Final OA | 56d | AI Ready | Jun 25, 2021 |
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